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Searched refs:SPRCTL (Results 1 – 6 of 6) sorted by relevance

/drivers/gpu/drm/i915/gvt/
Ddisplay.c188 vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; in emulate_monitor_status_change()
499 vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE; in emulate_monitor_status_change()
Dfb_decoder.c423 val = vgpu_vreg_t(vgpu, SPRCTL(pipe)); in intel_vgpu_decode_sprite_plane()
Dhandlers.c789 if (vgpu_vreg_t(vgpu, SPRCTL(pipe)) & PLANE_CTL_ASYNC_FLIP) in spr_surf_mmio_write()
2118 MMIO_D(SPRCTL(PIPE_A), D_ALL); in init_generic_mmio_info()
2133 MMIO_D(SPRCTL(PIPE_B), D_ALL); in init_generic_mmio_info()
2148 MMIO_D(SPRCTL(PIPE_C), D_ALL); in init_generic_mmio_info()
Dcmd_parser.c1283 info->ctrl_reg = SPRCTL(info->pipe); in gen8_decode_mi_display_flip()
/drivers/gpu/drm/i915/display/
Dintel_sprite.c1513 intel_de_write_fw(dev_priv, SPRCTL(pipe), sprctl); in ivb_update_plane()
1532 intel_de_write_fw(dev_priv, SPRCTL(pipe), 0); in ivb_disable_plane()
1555 ret = intel_de_read(dev_priv, SPRCTL(plane->pipe)) & SPRITE_ENABLE; in ivb_plane_get_hw_state()
/drivers/gpu/drm/i915/
Di915_reg.h6752 #define SPRCTL(pipe) _MMIO_PIPE(pipe, _SPRA_CTL, _SPRB_CTL) macro