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Searched refs:SQ_EDC_INFO__SIMD_ID_MASK (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_1_sh_mask.h312 #define SQ_EDC_INFO__SIMD_ID_MASK … macro
Dgc_9_0_sh_mask.h3225 #define SQ_EDC_INFO__SIMD_ID_MASK … macro
Dgc_9_1_sh_mask.h3073 #define SQ_EDC_INFO__SIMD_ID_MASK … macro
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h14081 #define SQ_EDC_INFO__SIMD_ID_MASK 0x30 macro
Dgfx_8_1_sh_mask.h14479 #define SQ_EDC_INFO__SIMD_ID_MASK 0x30 macro