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Searched refs:SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h9898 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK 0x00000300L macro
Dgfx_7_2_sh_mask.h12457 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK 0x300 macro
Dgfx_8_0_sh_mask.h14327 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK 0x300 macro
Dgfx_8_1_sh_mask.h14725 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK 0x300 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h28553 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK macro
Dgc_9_1_sh_mask.h29767 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK macro
Dgc_9_2_1_sh_mask.h30095 #define SQ_WAVE_IB_DBG0__IBUF_RPTR_MASK macro