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Searched refs:SQ_WAVE_IB_DBG0__IBUF_ST_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h9900 #define SQ_WAVE_IB_DBG0__IBUF_ST_MASK 0x00000007L macro
Dgfx_7_2_sh_mask.h12449 #define SQ_WAVE_IB_DBG0__IBUF_ST_MASK 0x7 macro
Dgfx_8_0_sh_mask.h14319 #define SQ_WAVE_IB_DBG0__IBUF_ST_MASK 0x7 macro
Dgfx_8_1_sh_mask.h14717 #define SQ_WAVE_IB_DBG0__IBUF_ST_MASK 0x7 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h28549 #define SQ_WAVE_IB_DBG0__IBUF_ST_MASK macro
Dgc_9_1_sh_mask.h29763 #define SQ_WAVE_IB_DBG0__IBUF_ST_MASK macro
Dgc_9_2_1_sh_mask.h30091 #define SQ_WAVE_IB_DBG0__IBUF_ST_MASK macro