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Searched refs:TA_BC_BASE_ADDR__ADDRESS_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h10424 #define TA_BC_BASE_ADDR__ADDRESS_MASK 0xffffffffL macro
Dgfx_7_2_sh_mask.h13863 #define TA_BC_BASE_ADDR__ADDRESS_MASK 0xffffffff macro
Dgfx_8_0_sh_mask.h15731 #define TA_BC_BASE_ADDR__ADDRESS_MASK 0xffffffff macro
Dgfx_8_1_sh_mask.h16301 #define TA_BC_BASE_ADDR__ADDRESS_MASK 0xffffffff macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h14586 #define TA_BC_BASE_ADDR__ADDRESS_MASK … macro
Dgc_9_1_sh_mask.h15893 #define TA_BC_BASE_ADDR__ADDRESS_MASK … macro
Dgc_9_2_1_sh_mask.h15755 #define TA_BC_BASE_ADDR__ADDRESS_MASK … macro
Dgc_10_3_0_sh_mask.h20077 #define TA_BC_BASE_ADDR__ADDRESS_MASK … macro
Dgc_10_1_0_sh_mask.h21908 #define TA_BC_BASE_ADDR__ADDRESS_MASK … macro