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Searched refs:TCC_CTRL__MDC_SIDEBAND_FIFO_SIZE_MASK (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h15545 #define TCC_CTRL__MDC_SIDEBAND_FIFO_SIZE_MASK 0xf0000000 macro
Dgfx_8_1_sh_mask.h16115 #define TCC_CTRL__MDC_SIDEBAND_FIFO_SIZE_MASK 0xf0000000 macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h9114 #define TCC_CTRL__MDC_SIDEBAND_FIFO_SIZE_MASK macro
Dgc_9_1_sh_mask.h10619 #define TCC_CTRL__MDC_SIDEBAND_FIFO_SIZE_MASK macro
Dgc_9_2_1_sh_mask.h10449 #define TCC_CTRL__MDC_SIDEBAND_FIFO_SIZE_MASK macro