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Searched refs:TCC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h10669 #define TCC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT 0x0000000a macro
Dgfx_7_2_sh_mask.h13702 #define TCC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT 0xa macro
Dgfx_8_0_sh_mask.h15624 #define TCC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT 0xa macro
Dgfx_8_1_sh_mask.h16194 #define TCC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT 0xa macro
/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h22079 #define TCC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_9_1_sh_mask.h23390 #define TCC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro
Dgc_9_2_1_sh_mask.h23385 #define TCC_PERFCOUNTER0_SELECT1__PERF_SEL3__SHIFT … macro