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Searched refs:TCP_EDC_CNT__SEC_COUNT_MASK (Results 1 – 7 of 7) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_1_sh_mask.h373 #define TCP_EDC_CNT__SEC_COUNT_MASK … macro
Dgc_9_0_sh_mask.h8774 #define TCP_EDC_CNT__SEC_COUNT_MASK … macro
Dgc_9_1_sh_mask.h10279 #define TCP_EDC_CNT__SEC_COUNT_MASK … macro
Dgc_10_3_0_sh_mask.h14503 #define TCP_EDC_CNT__SEC_COUNT_MASK … macro
Dgc_10_1_0_sh_mask.h15719 #define TCP_EDC_CNT__SEC_COUNT_MASK … macro
/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_sh_mask.h16073 #define TCP_EDC_CNT__SEC_COUNT_MASK 0xff macro
Dgfx_8_1_sh_mask.h16653 #define TCP_EDC_CNT__SEC_COUNT_MASK 0xff macro