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Searched refs:TI_CLK_GATE (Results 1 – 10 of 10) sorted by relevance

/drivers/clk/ti/
Dclk-54xx.c234 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
239 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
244 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
249 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
254 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
259 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
264 { 8, TI_CLK_GATE, omap5_gpio2_dbclk_parents, NULL },
338 { 8, TI_CLK_GATE, omap5_dss_dss_clk_parents, NULL },
339 { 9, TI_CLK_GATE, omap5_dss_48mhz_clk_parents, NULL },
340 { 10, TI_CLK_GATE, omap5_dss_sys_clk_parents, NULL },
[all …]
Dclk-44xx.c151 { 8, TI_CLK_GATE, omap4_slimbus1_fclk_0_parents, NULL },
152 { 9, TI_CLK_GATE, omap4_slimbus1_fclk_1_parents, NULL },
153 { 10, TI_CLK_GATE, omap4_slimbus1_fclk_2_parents, NULL },
154 { 11, TI_CLK_GATE, omap4_slimbus1_slimbus_clk_parents, NULL },
269 { 8, TI_CLK_GATE, omap4_iss_ctrlclk_parents, NULL },
315 { 8, TI_CLK_GATE, omap4_dss_dss_clk_parents, NULL },
316 { 9, TI_CLK_GATE, omap4_dss_48mhz_clk_parents, NULL },
317 { 10, TI_CLK_GATE, omap4_dss_sys_clk_parents, NULL },
318 { 11, TI_CLK_GATE, omap4_dss_tv_clk_parents, NULL },
407 { 8, TI_CLK_GATE, omap4_usb_host_hs_utmi_p1_clk_parents, NULL },
[all …]
Dclk-7xx-compat.c232 { 8, TI_CLK_GATE, dra7_dss_dss_clk_parents, NULL },
233 { 9, TI_CLK_GATE, dra7_dss_48mhz_clk_parents, NULL },
234 { 10, TI_CLK_GATE, dra7_dss_hdmi_clk_parents, NULL },
235 { 11, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
236 { 12, TI_CLK_GATE, dra7_dss_video1_clk_parents, NULL },
237 { 13, TI_CLK_GATE, dra7_dss_video2_clk_parents, NULL },
264 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
281 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
293 { 8, TI_CLK_GATE, dra7_usb_otg_ss2_refclk960m_parents, NULL },
303 { 8, TI_CLK_GATE, dra7_sata_ref_clk_parents, NULL },
[all …]
Dclk-7xx.c286 { 8, TI_CLK_GATE, dra7_dss_dss_clk_parents, NULL },
287 { 9, TI_CLK_GATE, dra7_dss_48mhz_clk_parents, NULL },
288 { 10, TI_CLK_GATE, dra7_dss_hdmi_clk_parents, NULL },
289 { 11, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
290 { 12, TI_CLK_GATE, dra7_dss_video1_clk_parents, NULL },
291 { 13, TI_CLK_GATE, dra7_dss_video2_clk_parents, NULL },
343 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
360 { 8, TI_CLK_GATE, dra7_dss_32khz_clk_parents, NULL },
372 { 8, TI_CLK_GATE, dra7_usb_otg_ss2_refclk960m_parents, NULL },
382 { 8, TI_CLK_GATE, dra7_sata_ref_clk_parents, NULL },
[all …]
Dclk-43xx-compat.c32 { 8, TI_CLK_GATE, am4_synctimer_32kclk_parents, NULL },
42 { 8, TI_CLK_GATE, am4_gpio0_dbclk_parents, NULL },
83 { 8, TI_CLK_GATE, am4_usb_otg_ss0_refclk960m_parents, NULL },
88 { 8, TI_CLK_GATE, am4_usb_otg_ss0_refclk960m_parents, NULL },
98 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
103 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
108 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
113 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
118 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
Dclk-43xx.c37 { 8, TI_CLK_GATE, am4_synctimer_32kclk_parents, NULL },
53 { 8, TI_CLK_GATE, am4_gpio0_dbclk_parents, NULL },
106 { 8, TI_CLK_GATE, am4_usb_otg_ss0_refclk960m_parents, NULL },
111 { 8, TI_CLK_GATE, am4_usb_otg_ss0_refclk960m_parents, NULL },
139 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
144 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
149 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
154 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
159 { 8, TI_CLK_GATE, am4_gpio1_dbclk_parents, NULL },
Dclk-33xx-compat.c32 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
37 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
42 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
107 { 18, TI_CLK_GATE, am3_gpio0_dbclk_parents, NULL },
148 { 19, TI_CLK_GATE, am3_dbg_sysclk_ck_parents, NULL },
153 { 30, TI_CLK_GATE, am3_dbg_clka_ck_parents, NULL },
Dclk-33xx.c32 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
37 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
42 { 18, TI_CLK_GATE, am3_gpio1_dbclk_parents, NULL },
135 { 18, TI_CLK_GATE, am3_gpio0_dbclk_parents, NULL },
190 { 19, TI_CLK_GATE, am3_dbg_sysclk_ck_parents, NULL },
195 { 30, TI_CLK_GATE, am3_dbg_clka_ck_parents, NULL },
Dclock.h53 TI_CLK_GATE, enumerator
Dclkctrl.c445 case TI_CLK_GATE: in _ti_clkctrl_setup_subclks()