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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Universal Flash Storage Host controller driver
4  * Copyright (C) 2011-2013 Samsung India Software Operations
5  *
6  * Authors:
7  *	Santosh Yaraganavi <santosh.sy@samsung.com>
8  *	Vinayak Holikatti <h.vinayak@samsung.com>
9  */
10 
11 #ifndef _UFS_H
12 #define _UFS_H
13 
14 #include <linux/mutex.h>
15 #include <linux/types.h>
16 #include <linux/android_kabi.h>
17 #include <uapi/scsi/scsi_bsg_ufs.h>
18 
19 #define GENERAL_UPIU_REQUEST_SIZE (sizeof(struct utp_upiu_req))
20 #define QUERY_DESC_MAX_SIZE       255
21 #define QUERY_DESC_MIN_SIZE       2
22 #define QUERY_DESC_HDR_SIZE       2
23 #define QUERY_OSF_SIZE            (GENERAL_UPIU_REQUEST_SIZE - \
24 					(sizeof(struct utp_upiu_header)))
25 #define UFS_SENSE_SIZE	18
26 
27 #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\
28 			cpu_to_be32((byte3 << 24) | (byte2 << 16) |\
29 			 (byte1 << 8) | (byte0))
30 /*
31  * UFS device may have standard LUs and LUN id could be from 0x00 to
32  * 0x7F. Standard LUs use "Peripheral Device Addressing Format".
33  * UFS device may also have the Well Known LUs (also referred as W-LU)
34  * which again could be from 0x00 to 0x7F. For W-LUs, device only use
35  * the "Extended Addressing Format" which means the W-LUNs would be
36  * from 0xc100 (SCSI_W_LUN_BASE) onwards.
37  * This means max. LUN number reported from UFS device could be 0xC17F.
38  */
39 #define UFS_UPIU_MAX_UNIT_NUM_ID	0x7F
40 #define UFS_MAX_LUNS		(SCSI_W_LUN_BASE + UFS_UPIU_MAX_UNIT_NUM_ID)
41 #define UFS_UPIU_WLUN_ID	(1 << 7)
42 #define UFS_RPMB_UNIT		0xC4
43 
44 /* WriteBooster buffer is available only for the logical unit from 0 to 7 */
45 #define UFS_UPIU_MAX_WB_LUN_ID	8
46 
47 /*
48  * WriteBooster buffer lifetime has a limit setted by vendor.
49  * If it is over the limit, WriteBooster feature will be disabled.
50  */
51 #define UFS_WB_EXCEED_LIFETIME		0x0B
52 
53 /* Well known logical unit id in LUN field of UPIU */
54 enum {
55 	UFS_UPIU_REPORT_LUNS_WLUN	= 0x81,
56 	UFS_UPIU_UFS_DEVICE_WLUN	= 0xD0,
57 	UFS_UPIU_BOOT_WLUN		= 0xB0,
58 	UFS_UPIU_RPMB_WLUN		= 0xC4,
59 };
60 
61 /*
62  * UFS Protocol Information Unit related definitions
63  */
64 
65 /* Task management functions */
66 enum {
67 	UFS_ABORT_TASK		= 0x01,
68 	UFS_ABORT_TASK_SET	= 0x02,
69 	UFS_CLEAR_TASK_SET	= 0x04,
70 	UFS_LOGICAL_RESET	= 0x08,
71 	UFS_QUERY_TASK		= 0x80,
72 	UFS_QUERY_TASK_SET	= 0x81,
73 };
74 
75 /* UTP UPIU Transaction Codes Initiator to Target */
76 enum {
77 	UPIU_TRANSACTION_NOP_OUT	= 0x00,
78 	UPIU_TRANSACTION_COMMAND	= 0x01,
79 	UPIU_TRANSACTION_DATA_OUT	= 0x02,
80 	UPIU_TRANSACTION_TASK_REQ	= 0x04,
81 	UPIU_TRANSACTION_QUERY_REQ	= 0x16,
82 };
83 
84 /* UTP UPIU Transaction Codes Target to Initiator */
85 enum {
86 	UPIU_TRANSACTION_NOP_IN		= 0x20,
87 	UPIU_TRANSACTION_RESPONSE	= 0x21,
88 	UPIU_TRANSACTION_DATA_IN	= 0x22,
89 	UPIU_TRANSACTION_TASK_RSP	= 0x24,
90 	UPIU_TRANSACTION_READY_XFER	= 0x31,
91 	UPIU_TRANSACTION_QUERY_RSP	= 0x36,
92 	UPIU_TRANSACTION_REJECT_UPIU	= 0x3F,
93 };
94 
95 /* UPIU Read/Write flags */
96 enum {
97 	UPIU_CMD_FLAGS_NONE	= 0x00,
98 	UPIU_CMD_FLAGS_WRITE	= 0x20,
99 	UPIU_CMD_FLAGS_READ	= 0x40,
100 };
101 
102 /* UPIU Task Attributes */
103 enum {
104 	UPIU_TASK_ATTR_SIMPLE	= 0x00,
105 	UPIU_TASK_ATTR_ORDERED	= 0x01,
106 	UPIU_TASK_ATTR_HEADQ	= 0x02,
107 	UPIU_TASK_ATTR_ACA	= 0x03,
108 };
109 
110 /* UPIU Query request function */
111 enum {
112 	UPIU_QUERY_FUNC_STANDARD_READ_REQUEST           = 0x01,
113 	UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST          = 0x81,
114 };
115 
116 /* Flag idn for Query Requests*/
117 enum flag_idn {
118 	QUERY_FLAG_IDN_FDEVICEINIT			= 0x01,
119 	QUERY_FLAG_IDN_PERMANENT_WPE			= 0x02,
120 	QUERY_FLAG_IDN_PWR_ON_WPE			= 0x03,
121 	QUERY_FLAG_IDN_BKOPS_EN				= 0x04,
122 	QUERY_FLAG_IDN_LIFE_SPAN_MODE_ENABLE		= 0x05,
123 	QUERY_FLAG_IDN_PURGE_ENABLE			= 0x06,
124 	QUERY_FLAG_IDN_RESERVED2			= 0x07,
125 	QUERY_FLAG_IDN_FPHYRESOURCEREMOVAL		= 0x08,
126 	QUERY_FLAG_IDN_BUSY_RTC				= 0x09,
127 	QUERY_FLAG_IDN_RESERVED3			= 0x0A,
128 	QUERY_FLAG_IDN_PERMANENTLY_DISABLE_FW_UPDATE	= 0x0B,
129 	QUERY_FLAG_IDN_WB_EN                            = 0x0E,
130 	QUERY_FLAG_IDN_WB_BUFF_FLUSH_EN                 = 0x0F,
131 	QUERY_FLAG_IDN_WB_BUFF_FLUSH_DURING_HIBERN8     = 0x10,
132 	QUERY_FLAG_IDN_HPB_RESET                        = 0x11,
133 	QUERY_FLAG_IDN_HPB_EN				= 0x12,
134 };
135 
136 /* Attribute idn for Query requests */
137 enum attr_idn {
138 	QUERY_ATTR_IDN_BOOT_LU_EN		= 0x00,
139 	QUERY_ATTR_IDN_MAX_HPB_SINGLE_CMD	= 0x01,
140 	QUERY_ATTR_IDN_POWER_MODE		= 0x02,
141 	QUERY_ATTR_IDN_ACTIVE_ICC_LVL		= 0x03,
142 	QUERY_ATTR_IDN_OOO_DATA_EN		= 0x04,
143 	QUERY_ATTR_IDN_BKOPS_STATUS		= 0x05,
144 	QUERY_ATTR_IDN_PURGE_STATUS		= 0x06,
145 	QUERY_ATTR_IDN_MAX_DATA_IN		= 0x07,
146 	QUERY_ATTR_IDN_MAX_DATA_OUT		= 0x08,
147 	QUERY_ATTR_IDN_DYN_CAP_NEEDED		= 0x09,
148 	QUERY_ATTR_IDN_REF_CLK_FREQ		= 0x0A,
149 	QUERY_ATTR_IDN_CONF_DESC_LOCK		= 0x0B,
150 	QUERY_ATTR_IDN_MAX_NUM_OF_RTT		= 0x0C,
151 	QUERY_ATTR_IDN_EE_CONTROL		= 0x0D,
152 	QUERY_ATTR_IDN_EE_STATUS		= 0x0E,
153 	QUERY_ATTR_IDN_SECONDS_PASSED		= 0x0F,
154 	QUERY_ATTR_IDN_CNTX_CONF		= 0x10,
155 	QUERY_ATTR_IDN_CORR_PRG_BLK_NUM		= 0x11,
156 	QUERY_ATTR_IDN_RESERVED2		= 0x12,
157 	QUERY_ATTR_IDN_RESERVED3		= 0x13,
158 	QUERY_ATTR_IDN_FFU_STATUS		= 0x14,
159 	QUERY_ATTR_IDN_PSA_STATE		= 0x15,
160 	QUERY_ATTR_IDN_PSA_DATA_SIZE		= 0x16,
161 	QUERY_ATTR_IDN_REF_CLK_GATING_WAIT_TIME	= 0x17,
162 	QUERY_ATTR_IDN_CASE_ROUGH_TEMP          = 0x18,
163 	QUERY_ATTR_IDN_HIGH_TEMP_BOUND          = 0x19,
164 	QUERY_ATTR_IDN_LOW_TEMP_BOUND           = 0x1A,
165 	QUERY_ATTR_IDN_WB_FLUSH_STATUS	        = 0x1C,
166 	QUERY_ATTR_IDN_AVAIL_WB_BUFF_SIZE       = 0x1D,
167 	QUERY_ATTR_IDN_WB_BUFF_LIFE_TIME_EST    = 0x1E,
168 	QUERY_ATTR_IDN_CURR_WB_BUFF_SIZE        = 0x1F,
169 };
170 
171 /* Descriptor idn for Query requests */
172 enum desc_idn {
173 	QUERY_DESC_IDN_DEVICE		= 0x0,
174 	QUERY_DESC_IDN_CONFIGURATION	= 0x1,
175 	QUERY_DESC_IDN_UNIT		= 0x2,
176 	QUERY_DESC_IDN_RFU_0		= 0x3,
177 	QUERY_DESC_IDN_INTERCONNECT	= 0x4,
178 	QUERY_DESC_IDN_STRING		= 0x5,
179 	QUERY_DESC_IDN_RFU_1		= 0x6,
180 	QUERY_DESC_IDN_GEOMETRY		= 0x7,
181 	QUERY_DESC_IDN_POWER		= 0x8,
182 	QUERY_DESC_IDN_HEALTH           = 0x9,
183 	QUERY_DESC_IDN_MAX,
184 };
185 
186 enum desc_header_offset {
187 	QUERY_DESC_LENGTH_OFFSET	= 0x00,
188 	QUERY_DESC_DESC_TYPE_OFFSET	= 0x01,
189 };
190 
191 /* Unit descriptor parameters offsets in bytes*/
192 enum unit_desc_param {
193 	UNIT_DESC_PARAM_LEN			= 0x0,
194 	UNIT_DESC_PARAM_TYPE			= 0x1,
195 	UNIT_DESC_PARAM_UNIT_INDEX		= 0x2,
196 	UNIT_DESC_PARAM_LU_ENABLE		= 0x3,
197 	UNIT_DESC_PARAM_BOOT_LUN_ID		= 0x4,
198 	UNIT_DESC_PARAM_LU_WR_PROTECT		= 0x5,
199 	UNIT_DESC_PARAM_LU_Q_DEPTH		= 0x6,
200 	UNIT_DESC_PARAM_PSA_SENSITIVE		= 0x7,
201 	UNIT_DESC_PARAM_MEM_TYPE		= 0x8,
202 	UNIT_DESC_PARAM_DATA_RELIABILITY	= 0x9,
203 	UNIT_DESC_PARAM_LOGICAL_BLK_SIZE	= 0xA,
204 	UNIT_DESC_PARAM_LOGICAL_BLK_COUNT	= 0xB,
205 	UNIT_DESC_PARAM_ERASE_BLK_SIZE		= 0x13,
206 	UNIT_DESC_PARAM_PROVISIONING_TYPE	= 0x17,
207 	UNIT_DESC_PARAM_PHY_MEM_RSRC_CNT	= 0x18,
208 	UNIT_DESC_PARAM_CTX_CAPABILITIES	= 0x20,
209 	UNIT_DESC_PARAM_LARGE_UNIT_SIZE_M1	= 0x22,
210 	UNIT_DESC_PARAM_HPB_LU_MAX_ACTIVE_RGNS	= 0x23,
211 	UNIT_DESC_PARAM_HPB_PIN_RGN_START_OFF	= 0x25,
212 	UNIT_DESC_PARAM_HPB_NUM_PIN_RGNS	= 0x27,
213 	UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS	= 0x29,
214 };
215 
216 /* Device descriptor parameters offsets in bytes*/
217 enum device_desc_param {
218 	DEVICE_DESC_PARAM_LEN			= 0x0,
219 	DEVICE_DESC_PARAM_TYPE			= 0x1,
220 	DEVICE_DESC_PARAM_DEVICE_TYPE		= 0x2,
221 	DEVICE_DESC_PARAM_DEVICE_CLASS		= 0x3,
222 	DEVICE_DESC_PARAM_DEVICE_SUB_CLASS	= 0x4,
223 	DEVICE_DESC_PARAM_PRTCL			= 0x5,
224 	DEVICE_DESC_PARAM_NUM_LU		= 0x6,
225 	DEVICE_DESC_PARAM_NUM_WLU		= 0x7,
226 	DEVICE_DESC_PARAM_BOOT_ENBL		= 0x8,
227 	DEVICE_DESC_PARAM_DESC_ACCSS_ENBL	= 0x9,
228 	DEVICE_DESC_PARAM_INIT_PWR_MODE		= 0xA,
229 	DEVICE_DESC_PARAM_HIGH_PR_LUN		= 0xB,
230 	DEVICE_DESC_PARAM_SEC_RMV_TYPE		= 0xC,
231 	DEVICE_DESC_PARAM_SEC_LU		= 0xD,
232 	DEVICE_DESC_PARAM_BKOP_TERM_LT		= 0xE,
233 	DEVICE_DESC_PARAM_ACTVE_ICC_LVL		= 0xF,
234 	DEVICE_DESC_PARAM_SPEC_VER		= 0x10,
235 	DEVICE_DESC_PARAM_MANF_DATE		= 0x12,
236 	DEVICE_DESC_PARAM_MANF_NAME		= 0x14,
237 	DEVICE_DESC_PARAM_PRDCT_NAME		= 0x15,
238 	DEVICE_DESC_PARAM_SN			= 0x16,
239 	DEVICE_DESC_PARAM_OEM_ID		= 0x17,
240 	DEVICE_DESC_PARAM_MANF_ID		= 0x18,
241 	DEVICE_DESC_PARAM_UD_OFFSET		= 0x1A,
242 	DEVICE_DESC_PARAM_UD_LEN		= 0x1B,
243 	DEVICE_DESC_PARAM_RTT_CAP		= 0x1C,
244 	DEVICE_DESC_PARAM_FRQ_RTC		= 0x1D,
245 	DEVICE_DESC_PARAM_UFS_FEAT		= 0x1F,
246 	DEVICE_DESC_PARAM_FFU_TMT		= 0x20,
247 	DEVICE_DESC_PARAM_Q_DPTH		= 0x21,
248 	DEVICE_DESC_PARAM_DEV_VER		= 0x22,
249 	DEVICE_DESC_PARAM_NUM_SEC_WPA		= 0x24,
250 	DEVICE_DESC_PARAM_PSA_MAX_DATA		= 0x25,
251 	DEVICE_DESC_PARAM_PSA_TMT		= 0x29,
252 	DEVICE_DESC_PARAM_PRDCT_REV		= 0x2A,
253 	DEVICE_DESC_PARAM_HPB_VER		= 0x40,
254 	DEVICE_DESC_PARAM_HPB_CONTROL		= 0x42,
255 	DEVICE_DESC_PARAM_EXT_UFS_FEATURE_SUP	= 0x4F,
256 	DEVICE_DESC_PARAM_WB_PRESRV_USRSPC_EN	= 0x53,
257 	DEVICE_DESC_PARAM_WB_TYPE		= 0x54,
258 	DEVICE_DESC_PARAM_WB_SHARED_ALLOC_UNITS = 0x55,
259 };
260 
261 /* Interconnect descriptor parameters offsets in bytes*/
262 enum interconnect_desc_param {
263 	INTERCONNECT_DESC_PARAM_LEN		= 0x0,
264 	INTERCONNECT_DESC_PARAM_TYPE		= 0x1,
265 	INTERCONNECT_DESC_PARAM_UNIPRO_VER	= 0x2,
266 	INTERCONNECT_DESC_PARAM_MPHY_VER	= 0x4,
267 };
268 
269 /* Geometry descriptor parameters offsets in bytes*/
270 enum geometry_desc_param {
271 	GEOMETRY_DESC_PARAM_LEN			= 0x0,
272 	GEOMETRY_DESC_PARAM_TYPE		= 0x1,
273 	GEOMETRY_DESC_PARAM_DEV_CAP		= 0x4,
274 	GEOMETRY_DESC_PARAM_MAX_NUM_LUN		= 0xC,
275 	GEOMETRY_DESC_PARAM_SEG_SIZE		= 0xD,
276 	GEOMETRY_DESC_PARAM_ALLOC_UNIT_SIZE	= 0x11,
277 	GEOMETRY_DESC_PARAM_MIN_BLK_SIZE	= 0x12,
278 	GEOMETRY_DESC_PARAM_OPT_RD_BLK_SIZE	= 0x13,
279 	GEOMETRY_DESC_PARAM_OPT_WR_BLK_SIZE	= 0x14,
280 	GEOMETRY_DESC_PARAM_MAX_IN_BUF_SIZE	= 0x15,
281 	GEOMETRY_DESC_PARAM_MAX_OUT_BUF_SIZE	= 0x16,
282 	GEOMETRY_DESC_PARAM_RPMB_RW_SIZE	= 0x17,
283 	GEOMETRY_DESC_PARAM_DYN_CAP_RSRC_PLC	= 0x18,
284 	GEOMETRY_DESC_PARAM_DATA_ORDER		= 0x19,
285 	GEOMETRY_DESC_PARAM_MAX_NUM_CTX		= 0x1A,
286 	GEOMETRY_DESC_PARAM_TAG_UNIT_SIZE	= 0x1B,
287 	GEOMETRY_DESC_PARAM_TAG_RSRC_SIZE	= 0x1C,
288 	GEOMETRY_DESC_PARAM_SEC_RM_TYPES	= 0x1D,
289 	GEOMETRY_DESC_PARAM_MEM_TYPES		= 0x1E,
290 	GEOMETRY_DESC_PARAM_SCM_MAX_NUM_UNITS	= 0x20,
291 	GEOMETRY_DESC_PARAM_SCM_CAP_ADJ_FCTR	= 0x24,
292 	GEOMETRY_DESC_PARAM_NPM_MAX_NUM_UNITS	= 0x26,
293 	GEOMETRY_DESC_PARAM_NPM_CAP_ADJ_FCTR	= 0x2A,
294 	GEOMETRY_DESC_PARAM_ENM1_MAX_NUM_UNITS	= 0x2C,
295 	GEOMETRY_DESC_PARAM_ENM1_CAP_ADJ_FCTR	= 0x30,
296 	GEOMETRY_DESC_PARAM_ENM2_MAX_NUM_UNITS	= 0x32,
297 	GEOMETRY_DESC_PARAM_ENM2_CAP_ADJ_FCTR	= 0x36,
298 	GEOMETRY_DESC_PARAM_ENM3_MAX_NUM_UNITS	= 0x38,
299 	GEOMETRY_DESC_PARAM_ENM3_CAP_ADJ_FCTR	= 0x3C,
300 	GEOMETRY_DESC_PARAM_ENM4_MAX_NUM_UNITS	= 0x3E,
301 	GEOMETRY_DESC_PARAM_ENM4_CAP_ADJ_FCTR	= 0x42,
302 	GEOMETRY_DESC_PARAM_OPT_LOG_BLK_SIZE	= 0x44,
303 	GEOMETRY_DESC_PARAM_HPB_REGION_SIZE	= 0x48,
304 	GEOMETRY_DESC_PARAM_HPB_NUMBER_LU	= 0x49,
305 	GEOMETRY_DESC_PARAM_HPB_SUBREGION_SIZE	= 0x4A,
306 	GEOMETRY_DESC_PARAM_HPB_MAX_ACTIVE_REGS	= 0x4B,
307 	GEOMETRY_DESC_PARAM_WB_MAX_ALLOC_UNITS	= 0x4F,
308 	GEOMETRY_DESC_PARAM_WB_MAX_WB_LUNS	= 0x53,
309 	GEOMETRY_DESC_PARAM_WB_BUFF_CAP_ADJ	= 0x54,
310 	GEOMETRY_DESC_PARAM_WB_SUP_RED_TYPE	= 0x55,
311 	GEOMETRY_DESC_PARAM_WB_SUP_WB_TYPE	= 0x56,
312 };
313 
314 /* Health descriptor parameters offsets in bytes*/
315 enum health_desc_param {
316 	HEALTH_DESC_PARAM_LEN			= 0x0,
317 	HEALTH_DESC_PARAM_TYPE			= 0x1,
318 	HEALTH_DESC_PARAM_EOL_INFO		= 0x2,
319 	HEALTH_DESC_PARAM_LIFE_TIME_EST_A	= 0x3,
320 	HEALTH_DESC_PARAM_LIFE_TIME_EST_B	= 0x4,
321 };
322 
323 /* WriteBooster buffer mode */
324 enum {
325 	WB_BUF_MODE_LU_DEDICATED	= 0x0,
326 	WB_BUF_MODE_SHARED		= 0x1,
327 };
328 
329 /*
330  * Logical Unit Write Protect
331  * 00h: LU not write protected
332  * 01h: LU write protected when fPowerOnWPEn =1
333  * 02h: LU permanently write protected when fPermanentWPEn =1
334  */
335 enum ufs_lu_wp_type {
336 	UFS_LU_NO_WP		= 0x00,
337 	UFS_LU_POWER_ON_WP	= 0x01,
338 	UFS_LU_PERM_WP		= 0x02,
339 };
340 
341 /* bActiveICCLevel parameter current units */
342 enum {
343 	UFSHCD_NANO_AMP		= 0,
344 	UFSHCD_MICRO_AMP	= 1,
345 	UFSHCD_MILI_AMP		= 2,
346 	UFSHCD_AMP		= 3,
347 };
348 
349 /* Possible values for dExtendedUFSFeaturesSupport */
350 enum {
351 	UFS_DEV_LOW_TEMP_NOTIF		= BIT(4),
352 	UFS_DEV_HIGH_TEMP_NOTIF		= BIT(5),
353 	UFS_DEV_EXT_TEMP_NOTIF		= BIT(6),
354 	UFS_DEV_HPB_SUPPORT		= BIT(7),
355 	UFS_DEV_WRITE_BOOSTER_SUP	= BIT(8),
356 };
357 #define UFS_DEV_HPB_SUPPORT_VERSION		0x310
358 
359 #define POWER_DESC_MAX_ACTV_ICC_LVLS		16
360 
361 /* Attribute  bActiveICCLevel parameter bit masks definitions */
362 #define ATTR_ICC_LVL_UNIT_OFFSET	14
363 #define ATTR_ICC_LVL_UNIT_MASK		(0x3 << ATTR_ICC_LVL_UNIT_OFFSET)
364 #define ATTR_ICC_LVL_VALUE_MASK		0x3FF
365 
366 /* Power descriptor parameters offsets in bytes */
367 enum power_desc_param_offset {
368 	PWR_DESC_LEN			= 0x0,
369 	PWR_DESC_TYPE			= 0x1,
370 	PWR_DESC_ACTIVE_LVLS_VCC_0	= 0x2,
371 	PWR_DESC_ACTIVE_LVLS_VCCQ_0	= 0x22,
372 	PWR_DESC_ACTIVE_LVLS_VCCQ2_0	= 0x42,
373 };
374 
375 /* Exception event mask values */
376 enum {
377 	MASK_EE_STATUS			= 0xFFFF,
378 	MASK_EE_DYNCAP_EVENT		= BIT(0),
379 	MASK_EE_SYSPOOL_EVENT		= BIT(1),
380 	MASK_EE_URGENT_BKOPS		= BIT(2),
381 	MASK_EE_TOO_HIGH_TEMP		= BIT(3),
382 	MASK_EE_TOO_LOW_TEMP		= BIT(4),
383 	MASK_EE_WRITEBOOSTER_EVENT	= BIT(5),
384 	MASK_EE_PERFORMANCE_THROTTLING	= BIT(6),
385 };
386 #define MASK_EE_URGENT_TEMP (MASK_EE_TOO_HIGH_TEMP | MASK_EE_TOO_LOW_TEMP)
387 
388 /* Background operation status */
389 enum bkops_status {
390 	BKOPS_STATUS_NO_OP               = 0x0,
391 	BKOPS_STATUS_NON_CRITICAL        = 0x1,
392 	BKOPS_STATUS_PERF_IMPACT         = 0x2,
393 	BKOPS_STATUS_CRITICAL            = 0x3,
394 	BKOPS_STATUS_MAX		 = BKOPS_STATUS_CRITICAL,
395 };
396 
397 /* UTP QUERY Transaction Specific Fields OpCode */
398 enum query_opcode {
399 	UPIU_QUERY_OPCODE_NOP		= 0x0,
400 	UPIU_QUERY_OPCODE_READ_DESC	= 0x1,
401 	UPIU_QUERY_OPCODE_WRITE_DESC	= 0x2,
402 	UPIU_QUERY_OPCODE_READ_ATTR	= 0x3,
403 	UPIU_QUERY_OPCODE_WRITE_ATTR	= 0x4,
404 	UPIU_QUERY_OPCODE_READ_FLAG	= 0x5,
405 	UPIU_QUERY_OPCODE_SET_FLAG	= 0x6,
406 	UPIU_QUERY_OPCODE_CLEAR_FLAG	= 0x7,
407 	UPIU_QUERY_OPCODE_TOGGLE_FLAG	= 0x8,
408 };
409 
410 /* bRefClkFreq attribute values */
411 enum ufs_ref_clk_freq {
412 	REF_CLK_FREQ_19_2_MHZ	= 0,
413 	REF_CLK_FREQ_26_MHZ	= 1,
414 	REF_CLK_FREQ_38_4_MHZ	= 2,
415 	REF_CLK_FREQ_52_MHZ	= 3,
416 	REF_CLK_FREQ_INVAL	= -1,
417 };
418 
419 struct ufs_ref_clk {
420 	unsigned long freq_hz;
421 	enum ufs_ref_clk_freq val;
422 };
423 
424 /* Query response result code */
425 enum {
426 	QUERY_RESULT_SUCCESS                    = 0x00,
427 	QUERY_RESULT_NOT_READABLE               = 0xF6,
428 	QUERY_RESULT_NOT_WRITEABLE              = 0xF7,
429 	QUERY_RESULT_ALREADY_WRITTEN            = 0xF8,
430 	QUERY_RESULT_INVALID_LENGTH             = 0xF9,
431 	QUERY_RESULT_INVALID_VALUE              = 0xFA,
432 	QUERY_RESULT_INVALID_SELECTOR           = 0xFB,
433 	QUERY_RESULT_INVALID_INDEX              = 0xFC,
434 	QUERY_RESULT_INVALID_IDN                = 0xFD,
435 	QUERY_RESULT_INVALID_OPCODE             = 0xFE,
436 	QUERY_RESULT_GENERAL_FAILURE            = 0xFF,
437 };
438 
439 /* UTP Transfer Request Command Type (CT) */
440 enum {
441 	UPIU_COMMAND_SET_TYPE_SCSI	= 0x0,
442 	UPIU_COMMAND_SET_TYPE_UFS	= 0x1,
443 	UPIU_COMMAND_SET_TYPE_QUERY	= 0x2,
444 };
445 
446 /* UTP Transfer Request Command Offset */
447 #define UPIU_COMMAND_TYPE_OFFSET	28
448 
449 /* Offset of the response code in the UPIU header */
450 #define UPIU_RSP_CODE_OFFSET		8
451 
452 enum {
453 	MASK_SCSI_STATUS		= 0xFF,
454 	MASK_TASK_RESPONSE              = 0xFF00,
455 	MASK_RSP_UPIU_RESULT            = 0xFFFF,
456 	MASK_QUERY_DATA_SEG_LEN         = 0xFFFF,
457 	MASK_RSP_UPIU_DATA_SEG_LEN	= 0xFFFF,
458 	MASK_RSP_EXCEPTION_EVENT        = 0x10000,
459 	MASK_TM_SERVICE_RESP		= 0xFF,
460 	MASK_TM_FUNC			= 0xFF,
461 };
462 
463 /* Task management service response */
464 enum {
465 	UPIU_TASK_MANAGEMENT_FUNC_COMPL		= 0x00,
466 	UPIU_TASK_MANAGEMENT_FUNC_NOT_SUPPORTED = 0x04,
467 	UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED	= 0x08,
468 	UPIU_TASK_MANAGEMENT_FUNC_FAILED	= 0x05,
469 	UPIU_INCORRECT_LOGICAL_UNIT_NO		= 0x09,
470 };
471 
472 /* UFS device power modes */
473 enum ufs_dev_pwr_mode {
474 	UFS_ACTIVE_PWR_MODE	= 1,
475 	UFS_SLEEP_PWR_MODE	= 2,
476 	UFS_POWERDOWN_PWR_MODE	= 3,
477 	UFS_DEEPSLEEP_PWR_MODE	= 4,
478 };
479 
480 #define UFS_WB_BUF_REMAIN_PERCENT(val) ((val) / 10)
481 
482 /**
483  * struct utp_cmd_rsp - Response UPIU structure
484  * @residual_transfer_count: Residual transfer count DW-3
485  * @reserved: Reserved double words DW-4 to DW-7
486  * @sense_data_len: Sense data length DW-8 U16
487  * @sense_data: Sense data field DW-8 to DW-12
488  */
489 struct utp_cmd_rsp {
490 	__be32 residual_transfer_count;
491 	__be32 reserved[4];
492 	__be16 sense_data_len;
493 	u8 sense_data[UFS_SENSE_SIZE];
494 };
495 
496 struct ufshpb_active_field {
497 	__be16 active_rgn;
498 	__be16 active_srgn;
499 };
500 #define HPB_ACT_FIELD_SIZE 4
501 
502 /**
503  * struct utp_hpb_rsp - Response UPIU structure
504  * @residual_transfer_count: Residual transfer count DW-3
505  * @reserved1: Reserved double words DW-4 to DW-7
506  * @sense_data_len: Sense data length DW-8 U16
507  * @desc_type: Descriptor type of sense data
508  * @additional_len: Additional length of sense data
509  * @hpb_op: HPB operation type
510  * @lun: LUN of response UPIU
511  * @active_rgn_cnt: Active region count
512  * @inactive_rgn_cnt: Inactive region count
513  * @hpb_active_field: Recommended to read HPB region and subregion
514  * @hpb_inactive_field: To be inactivated HPB region and subregion
515  */
516 struct utp_hpb_rsp {
517 	__be32 residual_transfer_count;
518 	__be32 reserved1[4];
519 	__be16 sense_data_len;
520 	u8 desc_type;
521 	u8 additional_len;
522 	u8 hpb_op;
523 	u8 lun;
524 	u8 active_rgn_cnt;
525 	u8 inactive_rgn_cnt;
526 	struct ufshpb_active_field hpb_active_field[2];
527 	__be16 hpb_inactive_field[2];
528 };
529 #define UTP_HPB_RSP_SIZE 40
530 
531 /**
532  * struct utp_upiu_rsp - general upiu response structure
533  * @header: UPIU header structure DW-0 to DW-2
534  * @sr: fields structure for scsi command DW-3 to DW-12
535  * @qr: fields structure for query request DW-3 to DW-7
536  */
537 struct utp_upiu_rsp {
538 	struct utp_upiu_header header;
539 	union {
540 		struct utp_cmd_rsp sr;
541 		struct utp_hpb_rsp hr;
542 		struct utp_upiu_query qr;
543 	};
544 };
545 
546 /**
547  * struct ufs_query_req - parameters for building a query request
548  * @query_func: UPIU header query function
549  * @upiu_req: the query request data
550  */
551 struct ufs_query_req {
552 	u8 query_func;
553 	struct utp_upiu_query upiu_req;
554 };
555 
556 /**
557  * struct ufs_query_resp - UPIU QUERY
558  * @response: device response code
559  * @upiu_res: query response data
560  */
561 struct ufs_query_res {
562 	u8 response;
563 	struct utp_upiu_query upiu_res;
564 };
565 
566 #define UFS_VREG_VCC_MIN_UV	   2700000 /* uV */
567 #define UFS_VREG_VCC_MAX_UV	   3600000 /* uV */
568 #define UFS_VREG_VCC_1P8_MIN_UV    1700000 /* uV */
569 #define UFS_VREG_VCC_1P8_MAX_UV    1950000 /* uV */
570 #define UFS_VREG_VCCQ_MIN_UV	   1140000 /* uV */
571 #define UFS_VREG_VCCQ_MAX_UV	   1260000 /* uV */
572 #define UFS_VREG_VCCQ2_MIN_UV	   1700000 /* uV */
573 #define UFS_VREG_VCCQ2_MAX_UV	   1950000 /* uV */
574 
575 /*
576  * VCCQ & VCCQ2 current requirement when UFS device is in sleep state
577  * and link is in Hibern8 state.
578  */
579 #define UFS_VREG_LPM_LOAD_UA	1000 /* uA */
580 
581 struct ufs_vreg {
582 	struct regulator *reg;
583 	const char *name;
584 	bool always_on;
585 	bool enabled;
586 	int min_uV;
587 	int max_uV;
588 	int max_uA;
589 };
590 
591 struct ufs_vreg_info {
592 	struct ufs_vreg *vcc;
593 	struct ufs_vreg *vccq;
594 	struct ufs_vreg *vccq2;
595 	struct ufs_vreg *vdd_hba;
596 };
597 
598 struct ufs_dev_info {
599 	bool	f_power_on_wp_en;
600 	/* Keeps information if any of the LU is power on write protected */
601 	bool	is_lu_power_on_wp;
602 	/* Maximum number of general LU supported by the UFS device */
603 	u8	max_lu_supported;
604 	u16	wmanufacturerid;
605 	/*UFS device Product Name */
606 	u8	*model;
607 	u16	wspecversion;
608 	u32	clk_gating_wait_us;
609 
610 	/* UFS HPB related flag */
611 	bool	hpb_enabled;
612 
613 	/* UFS WB related flags */
614 	bool    wb_enabled;
615 	bool    wb_buf_flush_enabled;
616 	u8	wb_dedicated_lu;
617 	u8      wb_buffer_type;
618 
619 	bool	b_rpm_dev_flush_capable;
620 	u8	b_presrv_uspc_en;
621 
622 	ANDROID_KABI_RESERVE(1);
623 };
624 
625 /*
626  * This enum is used in string mapping in include/trace/events/ufs.h.
627  */
628 enum ufs_trace_str_t {
629 	UFS_CMD_SEND, UFS_CMD_COMP, UFS_DEV_COMP,
630 	UFS_QUERY_SEND, UFS_QUERY_COMP, UFS_QUERY_ERR,
631 	UFS_TM_SEND, UFS_TM_COMP, UFS_TM_ERR
632 };
633 
634 /*
635  * Transaction Specific Fields (TSF) type in the UPIU package, this enum is
636  * used in include/trace/events/ufs.h for UFS command trace.
637  */
638 enum ufs_trace_tsf_t {
639 	UFS_TSF_CDB, UFS_TSF_OSF, UFS_TSF_TM_INPUT, UFS_TSF_TM_OUTPUT
640 };
641 
642 /**
643  * ufs_is_valid_unit_desc_lun - checks if the given LUN has a unit descriptor
644  * @dev_info: pointer of instance of struct ufs_dev_info
645  * @lun: LU number to check
646  * @return: true if the lun has a matching unit descriptor, false otherwise
647  */
ufs_is_valid_unit_desc_lun(struct ufs_dev_info * dev_info,u8 lun,u8 param_offset)648 static inline bool ufs_is_valid_unit_desc_lun(struct ufs_dev_info *dev_info,
649 		u8 lun, u8 param_offset)
650 {
651 	if (!dev_info || !dev_info->max_lu_supported) {
652 		pr_err("Max General LU supported by UFS isn't initialized\n");
653 		return false;
654 	}
655 	/* WB is available only for the logical unit from 0 to 7 */
656 	if (param_offset == UNIT_DESC_PARAM_WB_BUF_ALLOC_UNITS)
657 		return lun < UFS_UPIU_MAX_WB_LUN_ID;
658 	return lun == UFS_UPIU_RPMB_WLUN || (lun < dev_info->max_lu_supported);
659 }
660 
661 #endif /* End of Header */
662