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Searched refs:UFWP (Results 1 – 9 of 9) sorted by relevance

/drivers/staging/rtl8192e/rtl8192e/
Drtl_dm.c405 rtl92e_writeb(dev, UFWP, 1); in _rtl92e_dm_check_rate_adaptive()
1166 rtl92e_writeb(dev, UFWP, 1); in rtl92e_dm_restore_state()
1182 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_bb_initialgain_restore()
1205 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_bb_initialgain_restore()
1220 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_dm_backup_state()
1315 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_ctrl_initgain_byrssi_driver()
1348 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_ctrl_initgain_byrssi_false_alarm()
1367 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_ctrl_initgain_byrssi_false_alarm()
1418 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_ctrl_initgain_byrssi_false_alarm()
Dr8192E_hw.h382 UFWP = 0x318, enumerator
Dr8192E_phy.c1300 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_init_gain()
1349 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_init_gain()
1384 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in rtl92e_init_gain()
Dr8192E_dev.c674 rtl92e_writeb(dev, UFWP, 1); in _rtl92e_hwconfig()
2164 rtl92e_writeb(dev, UFWP, 1); in rtl92e_update_ratr_table()
Drtl_core.c1338 rtl92e_writeb(dev, UFWP, 1); in _rtl92e_if_silent_reset()
/drivers/staging/rtl8192u/
Dr8192U_dm.c404 write_nic_byte(dev, UFWP, 1); in dm_check_rate_adaptive()
1516 write_nic_byte(dev, UFWP, 1); in dm_restore_dynamic_mechanism_state()
1537 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1552 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1565 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_backup()
1673 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_driverrssi()
1711 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite.*/ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1746 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1836 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
Dr8192U_hw.h185 UFWP = 0x318, enumerator
Dr819xU_phy.c1633 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1672 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1701 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); in InitialGainOperateWorkItemCallBack()
Dr8192U_core.c1956 write_nic_byte(dev, UFWP, 1); in rtl8192_update_ratr_table()
2631 write_nic_byte(dev, UFWP, 1); in rtl8192_hwconfig()
3200 write_nic_byte(dev, UFWP, 1); in rtl819x_ifsilentreset()