Home
last modified time | relevance | path

Searched refs:UMC_BASE (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Darct_reg_init.c54 adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); in arct_reg_base_init()
Dvega20_reg_init.c52 adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); in vega20_reg_base_init()
/drivers/gpu/drm/amd/include/
Dnavi10_ip_offset.h127 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0, 0, 0, 0, 0 } }, variable
Dnavi12_ip_offset.h172 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
Dvega20_ip_offset.h135 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0, 0, 0, 0, 0 } }, variable
Dnavi14_ip_offset.h172 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
Dsienna_cichlid_ip_offset.h179 static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
Dvega10_ip_offset.h183 static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0, 0, 0, 0 } }, variable
Drenoir_ip_offset.h212 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
Darct_ip_offset.h211 static const struct IP_BASE UMC_BASE ={ { { { 0x000132C0, 0x00014000, 0x00425800, 0, 0, … variable