Searched refs:UMC_BASE (Results 1 – 10 of 10) sorted by relevance
/drivers/gpu/drm/amd/amdgpu/ |
D | arct_reg_init.c | 54 adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); in arct_reg_base_init()
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D | vega20_reg_init.c | 52 adev->reg_offset[UMC_HWIP][i] = (uint32_t *)(&(UMC_BASE.instance[i])); in vega20_reg_base_init()
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/drivers/gpu/drm/amd/include/ |
D | navi10_ip_offset.h | 127 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0, 0, 0, 0, 0 } }, variable
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D | navi12_ip_offset.h | 172 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
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D | vega20_ip_offset.h | 135 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0, 0, 0, 0, 0 } }, variable
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D | navi14_ip_offset.h | 172 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
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D | sienna_cichlid_ip_offset.h | 179 static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
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D | vega10_ip_offset.h | 183 static const struct IP_BASE UMC_BASE = { { { { 0x00014000, 0, 0, 0, 0 } }, variable
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D | renoir_ip_offset.h | 212 static const struct IP_BASE UMC_BASE ={ { { { 0x00014000, 0x02425800, 0, 0, 0 } }, variable
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D | arct_ip_offset.h | 211 static const struct IP_BASE UMC_BASE ={ { { { 0x000132C0, 0x00014000, 0x00425800, 0, 0, … variable
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