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Searched refs:UVD_BASE__INST4_SEG5 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/
Dvega20_ip_offset.h915 #define UVD_BASE__INST4_SEG5 0 macro
Darct_ip_offset.h1514 #define UVD_BASE__INST4_SEG5 0 macro