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Searched refs:UVD_CGC_GATE__IDCT_MASK (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c630 UVD_CGC_GATE__IDCT_MASK |
663 UVD_CGC_GATE__IDCT_MASK |
1279 UVD_CGC_GATE__IDCT_MASK | in uvd_v6_0_enable_clock_gating()
1367 UVD_CGC_GATE__IDCT_MASK |
Duvd_v5_0.c619 UVD_CGC_GATE__IDCT_MASK | in uvd_v5_0_enable_clock_gating()
706 UVD_CGC_GATE__IDCT_MASK |
Duvd_v7_0.c1649 UVD_CGC_GATE__IDCT_MASK |
Dvcn_v1_0.c488 | UVD_CGC_GATE__IDCT_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_5.c577 | UVD_CGC_GATE__IDCT_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v2_0.c513 | UVD_CGC_GATE__IDCT_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v3_0.c674 | UVD_CGC_GATE__IDCT_MASK in vcn_v3_0_disable_clock_gating()
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h404 #define UVD_CGC_GATE__IDCT_MASK macro
Duvd_4_0_sh_mask.h78 #define UVD_CGC_GATE__IDCT_MASK 0x00000080L macro
Duvd_4_2_sh_mask.h137 #define UVD_CGC_GATE__IDCT_MASK 0x80 macro
Duvd_3_1_sh_mask.h137 #define UVD_CGC_GATE__IDCT_MASK 0x80 macro
Duvd_5_0_sh_mask.h149 #define UVD_CGC_GATE__IDCT_MASK 0x80 macro
Duvd_6_0_sh_mask.h151 #define UVD_CGC_GATE__IDCT_MASK 0x80 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h832 #define UVD_CGC_GATE__IDCT_MASK macro
Dvcn_2_5_sh_mask.h1902 #define UVD_CGC_GATE__IDCT_MASK macro
Dvcn_2_0_0_sh_mask.h1851 #define UVD_CGC_GATE__IDCT_MASK macro
Dvcn_3_0_0_sh_mask.h2632 #define UVD_CGC_GATE__IDCT_MASK macro