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Searched refs:UVD_CGC_STATUS__VCPU_VCLK__SHIFT (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_sh_mask.h205 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x0000001a macro
Duvd_4_2_sh_mask.h216 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x1a macro
Duvd_3_1_sh_mask.h216 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x1a macro
Duvd_5_0_sh_mask.h232 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x1a macro
Duvd_6_0_sh_mask.h234 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT 0x1a macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h872 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT macro
Dvcn_2_5_sh_mask.h1942 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT macro
Dvcn_2_0_0_sh_mask.h1892 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT macro
Dvcn_3_0_0_sh_mask.h2672 #define UVD_CGC_STATUS__VCPU_VCLK__SHIFT macro