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Searched refs:UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_sh_mask.h215 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0x0000000a macro
Duvd_4_2_sh_mask.h288 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0xa macro
Duvd_3_1_sh_mask.h288 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0xa macro
Duvd_5_0_sh_mask.h312 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0xa macro
Duvd_6_0_sh_mask.h314 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT 0xa macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_sh_mask.h2036 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT … macro
Dvcn_2_0_0_sh_mask.h1988 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT … macro
Dvcn_3_0_0_sh_mask.h2766 #define UVD_CGC_UDEC_STATUS__DB_DCLK__SHIFT … macro