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Searched refs:UVD_CGC_UDEC_STATUS__DB_SCLK_MASK (Results 1 – 8 of 8) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_sh_mask.h216 #define UVD_CGC_UDEC_STATUS__DB_SCLK_MASK 0x00000200L macro
Duvd_4_2_sh_mask.h285 #define UVD_CGC_UDEC_STATUS__DB_SCLK_MASK 0x200 macro
Duvd_3_1_sh_mask.h285 #define UVD_CGC_UDEC_STATUS__DB_SCLK_MASK 0x200 macro
Duvd_5_0_sh_mask.h309 #define UVD_CGC_UDEC_STATUS__DB_SCLK_MASK 0x200 macro
Duvd_6_0_sh_mask.h311 #define UVD_CGC_UDEC_STATUS__DB_SCLK_MASK 0x200 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_sh_mask.h2050 #define UVD_CGC_UDEC_STATUS__DB_SCLK_MASK … macro
Dvcn_2_0_0_sh_mask.h2002 #define UVD_CGC_UDEC_STATUS__DB_SCLK_MASK … macro
Dvcn_3_0_0_sh_mask.h2780 #define UVD_CGC_UDEC_STATUS__DB_SCLK_MASK … macro