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Searched refs:UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h118 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK … macro
Duvd_4_0_sh_mask.h252 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK 0x80000000L macro
Duvd_4_2_sh_mask.h45 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK 0x80000000 macro
Duvd_3_1_sh_mask.h45 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK 0x80000000 macro
Duvd_5_0_sh_mask.h45 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK 0x80000000 macro
Duvd_6_0_sh_mask.h45 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK 0x80000000 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h308 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK … macro
Dvcn_2_5_sh_mask.h2197 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK … macro
Dvcn_2_0_0_sh_mask.h3168 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK … macro
Dvcn_3_0_0_sh_mask.h2963 #define UVD_GPCOM_VCPU_CMD__CMD_SOURCE_MASK … macro