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Searched refs:UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h524 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK … macro
Duvd_4_0_sh_mask.h326 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK 0x00002000L macro
Duvd_4_2_sh_mask.h359 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK 0x2000 macro
Duvd_3_1_sh_mask.h355 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK 0x2000 macro
Duvd_5_0_sh_mask.h391 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK 0x2000 macro
Duvd_6_0_sh_mask.h393 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK 0x2000 macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c815 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in vcn_v1_0_start_spg_mode()
996 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in vcn_v1_0_start_dpg_mode()
1051 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in vcn_v1_0_start_dpg_mode()
Duvd_v7_0.c870 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in uvd_v7_0_sriov_start()
985 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in uvd_v7_0_start()
Dvcn_v2_5.c808 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in vcn_v2_5_start_dpg_mode()
964 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in vcn_v2_5_start()
Dvcn_v2_0.c830 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in vcn_v2_0_start_dpg_mode()
967 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in vcn_v2_0_start()
Dvcn_v3_0.c932 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in vcn_v3_0_start_dpg_mode()
1091 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in vcn_v3_0_start()
Duvd_v6_0.c746 UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK | in uvd_v6_0_start()
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1046 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK … macro
Dvcn_2_5_sh_mask.h3368 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK … macro
Dvcn_2_0_0_sh_mask.h2417 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK … macro
Dvcn_3_0_0_sh_mask.h4683 #define UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK … macro