Home
last modified time | relevance | path

Searched refs:UVD_LMI_STATUS__WRITE_CLEAN_MASK (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_sh_mask.h382 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x00000002L macro
Duvd_4_2_sh_mask.h383 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x2 macro
Duvd_3_1_sh_mask.h379 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x2 macro
Duvd_5_0_sh_mask.h415 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x2 macro
Duvd_6_0_sh_mask.h417 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK 0x2 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1063 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK … macro
Dvcn_2_5_sh_mask.h3400 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK … macro
Dvcn_2_0_0_sh_mask.h2449 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK … macro
Dvcn_3_0_0_sh_mask.h4722 #define UVD_LMI_STATUS__WRITE_CLEAN_MASK … macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c1132 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v1_0_stop_spg_mode()
Dvcn_v2_5.c1352 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v2_5_stop()
Dvcn_v2_0.c1151 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v2_0_stop()
Dvcn_v3_0.c1482 UVD_LMI_STATUS__WRITE_CLEAN_MASK | in vcn_v3_0_stop()