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Searched refs:UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK (Results 1 – 13 of 13) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_sh_mask.h383 #define UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK 0x00000004L macro
Duvd_4_2_sh_mask.h385 #define UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK 0x4 macro
Duvd_3_1_sh_mask.h381 #define UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK 0x4 macro
Duvd_5_0_sh_mask.h417 #define UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK 0x4 macro
Duvd_6_0_sh_mask.h419 #define UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK 0x4 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1064 #define UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK … macro
Dvcn_2_5_sh_mask.h3401 #define UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK … macro
Dvcn_2_0_0_sh_mask.h2450 #define UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK … macro
Dvcn_3_0_0_sh_mask.h4723 #define UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK … macro
/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c1133 UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK; in vcn_v1_0_stop_spg_mode()
Dvcn_v2_5.c1353 UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK; in vcn_v2_5_stop()
Dvcn_v2_0.c1152 UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK; in vcn_v2_0_stop()
Dvcn_v3_0.c1483 UVD_LMI_STATUS__WRITE_CLEAN_RAW_MASK; in vcn_v3_0_stop()