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Searched refs:UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h570 #define UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT macro
Duvd_4_0_sh_mask.h557 #define UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT 0x0000000a macro
Duvd_4_2_sh_mask.h450 #define UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT 0xa macro
Duvd_3_1_sh_mask.h446 #define UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT 0xa macro
Duvd_5_0_sh_mask.h482 #define UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT 0xa macro
Duvd_6_0_sh_mask.h484 #define UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT 0xa macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_2_5_sh_mask.h2784 #define UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT macro
Dvcn_2_0_0_sh_mask.h2549 #define UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT macro
Dvcn_3_0_0_sh_mask.h3850 #define UVD_MP_SWAP_CNTL__MP_REF5_MC_SWAP__SHIFT macro