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Searched refs:UVD_PGFSM_CONFIG__UVD_PGFSM_REG_ADDR__SHIFT (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_sh_mask.h579 #define UVD_PGFSM_CONFIG__UVD_PGFSM_REG_ADDR__SHIFT 0x0000001c macro
Duvd_4_2_sh_mask.h738 #define UVD_PGFSM_CONFIG__UVD_PGFSM_REG_ADDR__SHIFT 0x1c macro
Duvd_3_1_sh_mask.h732 #define UVD_PGFSM_CONFIG__UVD_PGFSM_REG_ADDR__SHIFT 0x1c macro
Duvd_5_0_sh_mask.h922 #define UVD_PGFSM_CONFIG__UVD_PGFSM_REG_ADDR__SHIFT 0x1c macro
Duvd_6_0_sh_mask.h910 #define UVD_PGFSM_CONFIG__UVD_PGFSM_REG_ADDR__SHIFT 0x1c macro