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Searched refs:UVD_PGFSM_CONFIG__UVD_PGFSM_WRITE__SHIFT (Results 1 – 5 of 5) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_sh_mask.h581 #define UVD_PGFSM_CONFIG__UVD_PGFSM_WRITE__SHIFT 0x0000000c macro
Duvd_4_2_sh_mask.h734 #define UVD_PGFSM_CONFIG__UVD_PGFSM_WRITE__SHIFT 0xc macro
Duvd_3_1_sh_mask.h728 #define UVD_PGFSM_CONFIG__UVD_PGFSM_WRITE__SHIFT 0xc macro
Duvd_5_0_sh_mask.h918 #define UVD_PGFSM_CONFIG__UVD_PGFSM_WRITE__SHIFT 0xc macro
Duvd_6_0_sh_mask.h906 #define UVD_PGFSM_CONFIG__UVD_PGFSM_WRITE__SHIFT 0xc macro