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Searched refs:UVD_RBC_RB_CNTL__RB_BUFSZ_MASK (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h741 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
Duvd_4_0_sh_mask.h596 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x0000001fL macro
Duvd_4_2_sh_mask.h615 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x1f macro
Duvd_3_1_sh_mask.h609 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x1f macro
Duvd_5_0_sh_mask.h677 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x1f macro
Duvd_6_0_sh_mask.h679 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK 0x1f macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1268 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
Dvcn_2_5_sh_mask.h2915 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
Dvcn_2_0_0_sh_mask.h2886 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro
Dvcn_3_0_0_sh_mask.h3995 #define UVD_RBC_RB_CNTL__RB_BUFSZ_MASK … macro