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Searched refs:UVD_RB_BASE_HI4__RB_BASE_HI__SHIFT (Results 1 – 4 of 4) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h1348 #define UVD_RB_BASE_HI4__RB_BASE_HI__SHIFT macro
Dvcn_2_5_sh_mask.h2504 #define UVD_RB_BASE_HI4__RB_BASE_HI__SHIFT macro
Dvcn_2_0_0_sh_mask.h3073 #define UVD_RB_BASE_HI4__RB_BASE_HI__SHIFT macro
Dvcn_3_0_0_sh_mask.h3433 #define UVD_RB_BASE_HI4__RB_BASE_HI__SHIFT macro