Home
last modified time | relevance | path

Searched refs:UVD_SEMA_CMD__MODE_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_sh_mask.h616 #define UVD_SEMA_CMD__MODE_MASK 0x00000040L macro
Duvd_4_2_sh_mask.h35 #define UVD_SEMA_CMD__MODE_MASK 0x40 macro
Duvd_3_1_sh_mask.h35 #define UVD_SEMA_CMD__MODE_MASK 0x40 macro
Duvd_5_0_sh_mask.h35 #define UVD_SEMA_CMD__MODE_MASK 0x40 macro
Duvd_6_0_sh_mask.h35 #define UVD_SEMA_CMD__MODE_MASK 0x40 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h299 #define UVD_SEMA_CMD__MODE_MASK … macro
Dvcn_2_5_sh_mask.h2958 #define UVD_SEMA_CMD__MODE_MASK … macro
Dvcn_2_0_0_sh_mask.h3159 #define UVD_SEMA_CMD__MODE_MASK … macro
Dvcn_3_0_0_sh_mask.h4046 #define UVD_SEMA_CMD__MODE_MASK … macro