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Searched refs:UVD_SEMA_CMD__REQ_CMD_MASK (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_sh_mask.h618 #define UVD_SEMA_CMD__REQ_CMD_MASK 0x0000000fL macro
Duvd_4_2_sh_mask.h31 #define UVD_SEMA_CMD__REQ_CMD_MASK 0xf macro
Duvd_3_1_sh_mask.h31 #define UVD_SEMA_CMD__REQ_CMD_MASK 0xf macro
Duvd_5_0_sh_mask.h31 #define UVD_SEMA_CMD__REQ_CMD_MASK 0xf macro
Duvd_6_0_sh_mask.h31 #define UVD_SEMA_CMD__REQ_CMD_MASK 0xf macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h297 #define UVD_SEMA_CMD__REQ_CMD_MASK … macro
Dvcn_2_5_sh_mask.h2956 #define UVD_SEMA_CMD__REQ_CMD_MASK … macro
Dvcn_2_0_0_sh_mask.h3157 #define UVD_SEMA_CMD__REQ_CMD_MASK … macro
Dvcn_3_0_0_sh_mask.h4044 #define UVD_SEMA_CMD__REQ_CMD_MASK … macro