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Searched refs:UVD_SUVD_CGC_GATE__SIT_MASK (Results 1 – 14 of 14) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c644 UVD_SUVD_CGC_GATE__SIT_MASK |
677 UVD_SUVD_CGC_GATE__SIT_MASK |
1259 UVD_SUVD_CGC_GATE__SIT_MASK | in uvd_v6_0_enable_clock_gating()
1384 UVD_SUVD_CGC_GATE__SIT_MASK |
Duvd_v5_0.c608 UVD_SUVD_CGC_GATE__SIT_MASK | in uvd_v5_0_enable_clock_gating()
721 UVD_SUVD_CGC_GATE__SIT_MASK |
Duvd_v7_0.c1593 UVD_SUVD_CGC_GATE__SIT_MASK |
1666 UVD_SUVD_CGC_GATE__SIT_MASK |
Dvcn_v1_0.c529 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v1_0_disable_clock_gating()
Dvcn_v2_5.c621 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v2_5_disable_clock_gating()
Dvcn_v2_0.c554 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v2_0_disable_clock_gating()
Dvcn_v3_0.c717 | UVD_SUVD_CGC_GATE__SIT_MASK in vcn_v3_0_disable_clock_gating()
/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_sh_mask.h227 #define UVD_SUVD_CGC_GATE__SIT_MASK macro
Duvd_5_0_sh_mask.h725 #define UVD_SUVD_CGC_GATE__SIT_MASK 0x2 macro
Duvd_6_0_sh_mask.h727 #define UVD_SUVD_CGC_GATE__SIT_MASK 0x2 macro
/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_sh_mask.h455 #define UVD_SUVD_CGC_GATE__SIT_MASK macro
Dvcn_2_5_sh_mask.h2084 #define UVD_SUVD_CGC_GATE__SIT_MASK macro
Dvcn_2_0_0_sh_mask.h3210 #define UVD_SUVD_CGC_GATE__SIT_MASK macro
Dvcn_3_0_0_sh_mask.h2820 #define UVD_SUVD_CGC_GATE__SIT_MASK macro