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Searched refs:WD_DEBUG_REG5__p1_pipe3_rtr__SHIFT (Results 1 – 3 of 3) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_sh_mask.h16306 #define WD_DEBUG_REG5__p1_pipe3_rtr__SHIFT 0x1d macro
Dgfx_8_0_sh_mask.h18448 #define WD_DEBUG_REG5__p1_pipe3_rtr__SHIFT 0x1d macro
Dgfx_8_1_sh_mask.h19038 #define WD_DEBUG_REG5__p1_pipe3_rtr__SHIFT 0x1d macro