Home
last modified time | relevance | path

Searched refs:XGMAC_DMA_INTR_ENA (Results 1 – 2 of 2) sorted by relevance

/drivers/vfio/platform/reset/
Dvfio_platform_calxedaxgmac.c27 #define XGMAC_DMA_INTR_ENA 0x00000f1c /* Interrupt Enable */ macro
61 writel(0, reg->ioaddr + XGMAC_DMA_INTR_ENA); in vfio_platform_calxedaxgmac_reset()
/drivers/net/ethernet/calxeda/
Dxgmac.c90 #define XGMAC_DMA_INTR_ENA 0x00000f1c /* Interrupt Enable */ macro
912 writel(0, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_tx_timeout_work()
939 writel(DMA_INTR_DEFAULT_MASK, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_tx_timeout_work()
967 writel(0, ioaddr + XGMAC_DMA_INTR_ENA); in xgmac_hw_init()
1037 writel(DMA_INTR_DEFAULT_MASK, ioaddr + XGMAC_DMA_INTR_ENA); in xgmac_open()
1052 if (readl(priv->base + XGMAC_DMA_INTR_ENA)) in xgmac_stop()
1055 writel(0, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_stop()
1241 __raw_writel(DMA_INTR_DEFAULT_MASK, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_poll()
1390 intr_status &= __raw_readl(priv->base + XGMAC_DMA_INTR_ENA); in xgmac_interrupt()
1423 __raw_writel(DMA_INTR_ABNORMAL, priv->base + XGMAC_DMA_INTR_ENA); in xgmac_interrupt()
[all …]