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Searched refs:_DPLL1_CFGCR2 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
Di915_reg.h10257 #define _DPLL1_CFGCR2 0x6C044 macro
10278 #define DPLL_CFGCR2(id) _MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR2, _DPLL2_CFGCR2)
/drivers/gpu/drm/i915/gvt/
Dhandlers.c2979 MMIO_D(_MMIO(_DPLL1_CFGCR2), D_SKL_PLUS); in init_skl_mmio_info()