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Searched refs:_DPLL2_CFGCR1 (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
Di915_reg.h10250 #define _DPLL2_CFGCR1 0x6C048 macro
10277 #define DPLL_CFGCR1(id) _MMIO_PIPE((id) - SKL_DPLL1, _DPLL1_CFGCR1, _DPLL2_CFGCR1)
/drivers/gpu/drm/i915/gvt/
Dhandlers.c2977 MMIO_D(_MMIO(_DPLL2_CFGCR1), D_SKL_PLUS); in init_skl_mmio_info()