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Searched refs:aq_hw_read_reg (Results 1 – 9 of 9) sorted by relevance

/drivers/net/ethernet/aquantia/atlantic/hw_atl/
Dhw_atl_utils.c104 val = aq_hw_read_reg(self, 0x53C); in hw_atl_utils_soft_reset_flb()
107 gsr = aq_hw_read_reg(self, HW_ATL_GLB_SOFT_RES_ADR); in hw_atl_utils_soft_reset_flb()
116 val = aq_hw_read_reg(self, 0x53C); in hw_atl_utils_soft_reset_flb()
125 u32 flb_status = aq_hw_read_reg(self, in hw_atl_utils_soft_reset_flb()
151 gsr = aq_hw_read_reg(self, HW_ATL_GLB_SOFT_RES_ADR); in hw_atl_utils_soft_reset_flb()
155 u32 fw_state = aq_hw_read_reg(self, HW_ATL_MPI_FW_VERSION); in hw_atl_utils_soft_reset_flb()
184 val = aq_hw_read_reg(self, 0x53C); in hw_atl_utils_soft_reset_rbl()
193 gsr = aq_hw_read_reg(self, HW_ATL_GLB_SOFT_RES_ADR); in hw_atl_utils_soft_reset_rbl()
204 rbl_status = aq_hw_read_reg(self, 0x388) & 0xFFFF; in hw_atl_utils_soft_reset_rbl()
224 u32 fw_state = aq_hw_read_reg(self, HW_ATL_MPI_FW_VERSION); in hw_atl_utils_soft_reset_rbl()
[all …]
Dhw_atl_utils_fw2x.c224 u32 mpi_state = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); in aq_fw2x_set_state()
253 mpi_state = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_STATE_ADDR); in aq_fw2x_update_link_status()
281 u32 efuse_addr = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_EFUSE_ADDR); in aq_fw2x_get_mac_permanent()
303 u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); in aq_fw2x_update_stats()
326 u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); in aq_fw2x_get_phy_temp()
432 ctrl2 = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); in aq_fw2x_send_fw_request()
449 u32 ptp_opts = aq_hw_read_reg(self, HW_ATL_FW3X_EXT_STATE_ADDR); in aq_fw3x_enable_ptp()
481 u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); in aq_fw2x_set_eee_rate()
516 u32 mpi_opts = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); in aq_fw2x_renegotiate()
527 u32 mpi_state = aq_hw_read_reg(self, HW_ATL_FW2X_MPI_CONTROL2_ADDR); in aq_fw2x_set_flow_control()
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Dhw_atl_llh.c69 return aq_hw_read_reg(aq_hw, HW_ATL_GLB_CPU_SEM_ADR(semaphore)); in hw_atl_reg_glb_cpu_sem_get()
96 return aq_hw_read_reg(aq_hw, HW_ATL_GLB_MIF_ID_ADR); in hw_atl_reg_glb_mif_id_get()
102 return aq_hw_read_reg(aq_hw, HW_ATL_RPB_RX_DMA_DROP_PKT_CNT_ADR); in hw_atl_rpb_rx_dma_drop_pkt_cnt_get()
320 return aq_hw_read_reg(aq_hw, HW_ATL_ITR_ISRLSW_ADR); in hw_atl_itr_irq_statuslsw_get()
488 return aq_hw_read_reg(aq_hw, HW_ATL_GEN_INTR_STAT_ADR); in hw_atl_reg_gen_irq_status_get()
519 return aq_hw_read_reg(aq_hw, HW_ATL_RX_DMA_DESC_STAT_ADR(descriptor)); in hw_atl_reg_rx_dma_desc_status_get()
1630 return aq_hw_read_reg(aq_hw, HW_ATL_MSM_REG_RD_DATA_ADR); in hw_atl_msm_reg_rd_data_get()
1674 return aq_hw_read_reg(aq_hw, HW_ATL_PCS_PTP_TS_VAL_ADDR(index)); in hw_atl_pcs_ptp_clock_get()
1784 return aq_hw_read_reg(aq_hw, in hw_atl_scrpad_get()
1805 return aq_hw_read_reg(aq_hw, HW_ATL_GLB_MDIO_IFACE_N_ADR(1)); in hw_atl_glb_mdio_iface1_get()
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Dhw_atl_utils.h15 #define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }
Dhw_atl_a0.c832 u32 n = 0xFFFFU & aq_hw_read_reg(self, 0x00002A00U); in hw_atl_a0_hw_interrupt_moderation_set()
Dhw_atl_b0.c587 val = aq_hw_read_reg(self, HW_ATL_PCI_REG_CONTROL6_ADR); in hw_atl_b0_hw_init()
/drivers/net/ethernet/aquantia/atlantic/hw_atl2/
Dhw_atl2_llh.c127 return aq_hw_read_reg(aq_hw, HW_ATL2_FPGA_VER_ADR); in hw_atl2_get_hw_version()
174 data[j] = aq_hw_read_reg(aq_hw, in hw_atl2_mif_shared_buf_get()
196 data[j] = aq_hw_read_reg(aq_hw, in hw_atl2_mif_shared_buf_read()
217 return aq_hw_read_reg(aq_hw, HW_ATL2_MIF_BOOT_REG_ADR); in hw_atl2_mif_mcp_boot_reg_get()
227 return aq_hw_read_reg(aq_hw, HW_ATL2_MCP_HOST_REQ_INT_ADR); in hw_atl2_mif_host_req_int_get()
/drivers/net/ethernet/aquantia/atlantic/
Daq_hw_utils.c25 reg_old = aq_hw_read_reg(aq_hw, addr); in aq_hw_write_reg_bit()
37 return ((aq_hw_read_reg(aq_hw, addr) & msk) >> shift); in aq_hw_read_reg_bit()
40 u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg) in aq_hw_read_reg() function
Daq_hw_utils.h34 u32 aq_hw_read_reg(struct aq_hw_s *hw, u32 reg);