| /drivers/staging/rtl8723bs/hal/ |
| D | odm_DIG.c | 23 …PHY_SetBBReg(pDM_Odm->Adapter, ODM_REG_FPGA0_IQK_11N, bMaskByte0, 0xff); /* 0xe28[7:0]= 0xff th_… in odm_NHMCounterStatisticsInit()
46 pDM_Odm->NHM_cnt_0 = (u8)(value32 & bMaskByte0); in odm_GetNHMCounterStatistics()
152 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc); in odm_SearchPwdBLowerBound()
176 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc); in odm_SearchPwdBLowerBound()
266 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, 0x7f); in odm_Adaptivity()
319 PHY_SetBBReg(pDM_Odm->Adapter, rOFDM0_ECCAThreshold, bMaskByte0, (u8)TH_L2H_dmc); in odm_Adaptivity()
945 pDM_Odm->Adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0 in odm_FalseAlarmCounterStatistics()
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| D | odm_NoiseMonitor.c | 121 reg_c50 = (s32)PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XAAGCCore1, bMaskByte0); in odm_InbandNoise_Monitor_NSeries()
128 reg_c58 = (s32)PHY_QueryBBReg(pDM_Odm->Adapter, rOFDM0_XBAGCCore1, bMaskByte0); in odm_InbandNoise_Monitor_NSeries()
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| D | rtl8723b_phycfg.c | 550 PHY_SetBBReg(Adapter, rTxAGC_A_Rate18_06, bMaskByte0, PowerIndex); in PHY_SetTxPowerIndex()
563 PHY_SetBBReg(Adapter, rTxAGC_A_Rate54_24, bMaskByte0, PowerIndex); in PHY_SetTxPowerIndex()
576 PHY_SetBBReg(Adapter, rTxAGC_A_Mcs03_Mcs00, bMaskByte0, PowerIndex); in PHY_SetTxPowerIndex()
589 PHY_SetBBReg(Adapter, rTxAGC_A_Mcs07_Mcs04, bMaskByte0, PowerIndex); in PHY_SetTxPowerIndex()
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| D | HalPhyRf_8723B.c | 1501 u8 tmp0xc50 = (u8)PHY_QueryBBReg(pDM_Odm->Adapter, 0xC50, bMaskByte0); in phy_IQCalibrate_8723B()
1502 u8 tmp0xc58 = (u8)PHY_QueryBBReg(pDM_Odm->Adapter, 0xC58, bMaskByte0); in phy_IQCalibrate_8723B()
1688 PHY_SetBBReg(pDM_Odm->Adapter, 0xc50, bMaskByte0, 0x50); in phy_IQCalibrate_8723B()
1689 PHY_SetBBReg(pDM_Odm->Adapter, 0xc50, bMaskByte0, tmp0xc50); in phy_IQCalibrate_8723B()
1691 PHY_SetBBReg(pDM_Odm->Adapter, 0xc58, bMaskByte0, 0x50); in phy_IQCalibrate_8723B()
1692 PHY_SetBBReg(pDM_Odm->Adapter, 0xc58, bMaskByte0, tmp0xc58); in phy_IQCalibrate_8723B()
1840 …path = (PHY_QueryBBReg(pDM_Odm->Adapter, rS0S1_PathSwitch, bMaskByte0) == 0x00) ? ODM_RF_PATH_A : … in PHY_IQCalibrate_8723B()
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| /drivers/staging/rtl8192u/ |
| D | r819xU_phyreg.h | 133 #define bMaskByte0 0xff macro
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| D | r819xU_phy.c | 1630 bitmask = bMaskByte0; in InitialGainOperateWorkItemCallBack()
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| D | r8192U_dm.c | 1559 u32 bit_mask = bMaskByte0; /* Bit0~ Bit6 */ in dm_bb_initialgain_backup()
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| /drivers/staging/rtl8188eu/include/ |
| D | hal8188e_phy_reg.h | 191 #define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ macro
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| /drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_phy.h | 50 #define bMaskByte0 0xff macro
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| D | r8192E_phyreg.h | 830 #define bMaskByte0 0xff macro
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| D | r8192E_phy.c | 1297 BitMask = bMaskByte0; in rtl92e_init_gain()
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| D | rtl_dm.c | 1212 u32 bit_mask = bMaskByte0; in rtl92e_dm_backup_state()
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| /drivers/staging/rtl8188eu/hal/ |
| D | rf.c | 110 phy_set_bb_reg(adapt, rTxAGC_B_CCK11_A_CCK2_11, bMaskByte0, tmpval); in rtl88eu_phy_rf6052_set_cck_txpower()
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| D | odm_rtl8188e.c | 127 phy_set_bb_reg(adapter, 0x914, bMaskByte0, 1); in dm_fast_training_init()
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| D | odm.c | 542 ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); in odm_FalseAlarmCounterStatistics()
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| /drivers/staging/rtl8712/ |
| D | rtl871x_mp_phy_regdef.h | 969 #define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ macro
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| /drivers/staging/rtl8723bs/include/ |
| D | Hal8192CPhyReg.h | 1064 #define bMaskByte0 0xff /* Reg 0xc50 rOFDM0_XAAGCCore~0xC6f */ macro
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