Searched refs:cdclk (Results 1 – 14 of 14) sorted by relevance
| /drivers/gpu/drm/i915/display/ |
| D | intel_cdclk.c | 63 cdclk_config->cdclk = 133333; in fixed_133mhz_get_cdclk()
69 cdclk_config->cdclk = 200000; in fixed_200mhz_get_cdclk()
75 cdclk_config->cdclk = 266667; in fixed_266mhz_get_cdclk()
81 cdclk_config->cdclk = 333333; in fixed_333mhz_get_cdclk()
87 cdclk_config->cdclk = 400000; in fixed_400mhz_get_cdclk()
93 cdclk_config->cdclk = 450000; in fixed_450mhz_get_cdclk()
108 cdclk_config->cdclk = 133333; in i85x_get_cdclk()
122 cdclk_config->cdclk = 200000; in i85x_get_cdclk()
125 cdclk_config->cdclk = 250000; in i85x_get_cdclk()
128 cdclk_config->cdclk = 133333; in i85x_get_cdclk()
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| D | intel_cdclk.h | 20 u32 cdclk; member
77 …to_intel_cdclk_state(intel_atomic_get_old_global_obj_state(state, &to_i915(state->base.dev)->cdclk…
79 …to_intel_cdclk_state(intel_atomic_get_new_global_obj_state(state, &to_i915(state->base.dev)->cdclk…
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| D | intel_audio.c | 524 unsigned int fec_coeff, cdclk, vdsc_bpp; in calc_hblank_early_prog() local
532 cdclk = i915->cdclk.hw.cdclk; in calc_hblank_early_prog()
540 h_active, link_clk, lanes, vdsc_bpp, cdclk); in calc_hblank_early_prog()
542 if (WARN_ON(!link_clk || !pixel_clk || !lanes || !vdsc_bpp || !cdclk)) in calc_hblank_early_prog()
551 hblank_delta = DIV64_U64_ROUND_UP(mul_u32_u32(5 * (link_clk + cdclk), pixel_clk), in calc_hblank_early_prog()
552 mul_u32_u32(link_clk, cdclk)); in calc_hblank_early_prog()
1085 return dev_priv->cdclk.hw.cdclk; in i915_audio_component_get_cdclk_freq()
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| D | intel_panel.c | 1498 clock = KHz(dev_priv->cdclk.hw.cdclk); in i9xx_hz_to_pwm()
1516 clock = KHz(dev_priv->cdclk.hw.cdclk); in i965_hz_to_pwm()
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| D | intel_fbc.c | 879 cache->crtc.hsw_bdw_pixel_rate >= dev_priv->cdclk.hw.cdclk * 95 / 100) { in intel_fbc_can_activate()
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| D | intel_dpll_mgr.c | 1776 i915->dpll.ref_clks.nssc = i915->cdclk.hw.ref; in skl_update_dpll_ref_clks()
2847 i915->dpll.ref_clks.nssc = i915->cdclk.hw.ref; in cnl_update_dpll_ref_clks()
4203 i915->dpll.ref_clks.nssc = i915->cdclk.hw.ref; in icl_update_dpll_ref_clks()
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| D | intel_display_power.c | 1187 intel_cdclk_needs_modeset(&dev_priv->cdclk.hw, in gen9_disable_dc_states()
4972 intel_dump_cdclk_config(&dev_priv->cdclk.hw, "Current CDCLK"); in hsw_restore_lcpll()
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| D | intel_display.c | 7660 to_intel_cdclk_state(dev_priv->cdclk.obj.state); in intel_crtc_disable_noatomic()
8008 if (crtc_state->pixel_rate > cdclk_state->logical.cdclk * 95 / 100) in hsw_compute_ips_config()
12690 cdclk_state->logical.cdclk); in hsw_ips_linetime_wm()
17574 to_intel_cdclk_state(i915->cdclk.obj.state); in intel_modeset_init_hw()
17579 intel_dump_cdclk_config(&i915->cdclk.hw, "Current CDCLK"); in intel_modeset_init_hw()
17580 cdclk_state->logical = cdclk_state->actual = i915->cdclk.hw; in intel_modeset_init_hw()
18468 to_intel_cdclk_state(dev_priv->cdclk.obj.state); in intel_modeset_readout_hw_state()
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| D | intel_dp.c | 1284 freq = dev_priv->cdclk.hw.cdclk; in ilk_get_aux_clock_divider()
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| /drivers/clk/samsung/ |
| D | clk-s5pv210-audss.c | 71 struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio; in s5pv210_audss_clk_probe() local
109 cdclk = devm_clk_get(&pdev->dev, "iiscdclk0"); in s5pv210_audss_clk_probe()
123 if (!IS_ERR(cdclk)) in s5pv210_audss_clk_probe()
124 mout_i2s_p[1] = __clk_get_name(cdclk); in s5pv210_audss_clk_probe()
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| D | clk-exynos-audss.c | 129 struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in; in exynos_audss_clk_probe() local
191 cdclk = devm_clk_get(dev, "cdclk"); in exynos_audss_clk_probe()
193 if (!IS_ERR(cdclk)) in exynos_audss_clk_probe()
194 mout_i2s_p[1] = __clk_get_name(cdclk); in exynos_audss_clk_probe()
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| /drivers/gpu/drm/i915/gt/ |
| D | debugfs_gt_pm.c | 476 seq_printf(m, "Current CD clock frequency: %d kHz\n", i915->cdclk.hw.cdclk); in frequency_show()
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| /drivers/gpu/drm/i915/ |
| D | i915_drv.h | 282 u8 (*calc_voltage_level)(int cdclk);
807 unsigned int cdclk, vco, ref, bypass; member
940 } cdclk; member
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| D | i915_debugfs.c | 1007 seq_printf(m, "Current CD clock frequency: %d kHz\n", dev_priv->cdclk.hw.cdclk); in i915_frequency_info()
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