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Searched refs:cfgr (Results 1 – 7 of 7) sorted by relevance

/drivers/mmc/host/
Dmmci_stm32_sdmmc.c451 u32 cfgr; in sdmmc_dlyb_set_cfgr() local
455 cfgr = FIELD_PREP(DLYB_CFGR_UNIT_MASK, unit) | in sdmmc_dlyb_set_cfgr()
457 writel_relaxed(cfgr, dlyb->base + DLYB_CFGR); in sdmmc_dlyb_set_cfgr()
466 u32 cfgr; in sdmmc_dlyb_lng_tuning() local
472 ret = readl_relaxed_poll_timeout(dlyb->base + DLYB_CFGR, cfgr, in sdmmc_dlyb_lng_tuning()
473 (cfgr & DLYB_CFGR_LNGF), in sdmmc_dlyb_lng_tuning()
478 i, cfgr); in sdmmc_dlyb_lng_tuning()
482 lng = FIELD_GET(DLYB_CFGR_LNG_MASK, cfgr); in sdmmc_dlyb_lng_tuning()
/drivers/pwm/
Dpwm-stm32-lp.c40 u32 val, mask, cfgr, presc = 0; in stm32_pwm_lp_apply() local
90 ret = regmap_read(priv->regmap, STM32_LPTIM_CFGR, &cfgr); in stm32_pwm_lp_apply()
94 if ((FIELD_GET(STM32_LPTIM_PRESC, cfgr) != presc) || in stm32_pwm_lp_apply()
95 (FIELD_GET(STM32_LPTIM_WAVPOL, cfgr) != state->polarity)) { in stm32_pwm_lp_apply()
/drivers/perf/
Darm_smmuv3_pmu.c767 u32 cfgr, reg_size; in smmu_pmu_probe() local
799 cfgr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CFGR); in smmu_pmu_probe()
802 if (cfgr & SMMU_PMCG_CFGR_RELOC_CTRS) { in smmu_pmu_probe()
819 smmu_pmu->num_counters = FIELD_GET(SMMU_PMCG_CFGR_NCTR, cfgr) + 1; in smmu_pmu_probe()
821 smmu_pmu->global_filter = !!(cfgr & SMMU_PMCG_CFGR_SID_FILTER_TYPE); in smmu_pmu_probe()
823 reg_size = FIELD_GET(SMMU_PMCG_CFGR_SIZE, cfgr); in smmu_pmu_probe()
/drivers/net/ethernet/freescale/enetc/
Denetc_pf.c377 u32 cfgr; in enetc_pf_set_vf_spoofchk() local
382 cfgr = enetc_port_rd(&priv->si->hw, ENETC_PSICFGR0(vf + 1)); in enetc_pf_set_vf_spoofchk()
383 cfgr = (cfgr & ~ENETC_PSICFGR0_ASE) | (en ? ENETC_PSICFGR0_ASE : 0); in enetc_pf_set_vf_spoofchk()
384 enetc_port_wr(&priv->si->hw, ENETC_PSICFGR0(vf + 1), cfgr); in enetc_pf_set_vf_spoofchk()
/drivers/pinctrl/
Dpinctrl-at91-pio4.c130 u32 cfgr[ATMEL_PIO_NPINS_PER_BANK]; member
944 atmel_pioctrl->pm_suspend_backup[i].cfgr[j] = in atmel_pctrl_suspend()
967 atmel_pioctrl->pm_suspend_backup[i].cfgr[j]); in atmel_pctrl_resume()
/drivers/net/ethernet/freescale/
Dfec_main.c1044 u32 cfgr; in fec_restart() local
1055 cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII) in fec_restart()
1058 cfgr |= BM_MIIGSK_CFGR_FRCONT_10M; in fec_restart()
1059 writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR); in fec_restart()
/drivers/net/wireless/cisco/
Dairo.c1829 ConfigRid cfgr; in writeConfigRid() local
1837 cfgr = ai->config; in writeConfigRid()
1839 if ((cfgr.opmode & MODE_CFG_MASK) == MODE_STA_IBSS) in writeConfigRid()
1844 return PC4500_writerid(ai, RID_CONFIG, &cfgr, sizeof(cfgr), lock); in writeConfigRid()