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Searched refs:chv_dpll_md (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/i915/
Di915_drv.h1075 u32 chv_dpll_md[I915_MAX_PIPES]; member
/drivers/gpu/drm/i915/display/
Dintel_display.c1487 dev_priv->chv_dpll_md[pipe] = pipe_config->dpll_hw_state.dpll_md; in chv_enable_pll()
9526 tmp = dev_priv->chv_dpll_md[crtc->pipe]; in i9xx_get_pipe_config()