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Searched refs:clk_mux_ops (Results 1 – 25 of 31) sorted by relevance

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/drivers/clk/imx/
Dclk-composite-8m.c132 return clk_mux_ops.get_parent(hw); in imx8m_clk_composite_mux_get_parent()
166 return clk_mux_ops.determine_rate(hw, req); in imx8m_clk_composite_mux_determine_rate()
220 mux_ops = &clk_mux_ops; in imx8m_clk_hw_composite_flags()
Dclk-composite-7ulp.c77 mux_hw, &clk_mux_ops, fd_hw, in imx7ulp_clk_hw_composite()
Dclk-fixup-mux.c94 fixup_mux->ops = &clk_mux_ops; in imx_clk_hw_fixup_mux()
Dclk-busy.c175 busy->mux_ops = &clk_mux_ops; in imx_clk_hw_busy_mux()
/drivers/clk/
Dclk-mux.c136 const struct clk_ops clk_mux_ops = { variable
141 EXPORT_SYMBOL_GPL(clk_mux_ops);
179 init.ops = &clk_mux_ops; in __clk_hw_register_mux()
Dclk-stm32f4.c1029 return clk_mux_ops.get_parent(hw); in cclk_mux_get_parent()
1040 ret = clk_mux_ops.set_parent(hw, index); in cclk_mux_set_parent()
1661 mux_ops = &clk_mux_ops; in stm32_register_aux_clk()
Dclk-stm32mp1.c629 mux_ops = &clk_mux_ops; in clk_stm32_register_composite()
699 return clk_mux_ops.get_parent(hw); in clk_mmux_get_parent()
709 ret = clk_mux_ops.set_parent(hw, index); in clk_mmux_set_parent()
/drivers/clk/nxp/
Dclk-lpc18xx-cgu.c548 &clk->mux.hw, &clk_mux_ops, in lpc18xx_cgu_register_div()
572 &clk->mux.hw, &clk_mux_ops, in lpc18xx_register_base_clk()
576 &clk->mux.hw, &clk_mux_ops, in lpc18xx_register_base_clk()
595 &clk->mux.hw, &clk_mux_ops, in lpc18xx_cgu_register_pll()
/drivers/clk/sunxi/
Dclk-a20-gmac.c92 &mux->hw, &clk_mux_ops, in sun7i_a20_gmac_clk_setup()
Dclk-a10-mod1.c55 &mux->hw, &clk_mux_ops, in sun4i_mod1_clk_setup()
Dclk-sun8i-mbus.c78 &mux->hw, &clk_mux_ops, in sun8i_a23_mbus_setup()
Dclk-sun9i-cpus.c218 &mux->hw, &clk_mux_ops, in sun9i_a80_cpus_setup()
Dclk-sun4i-display.c159 &mux->hw, &clk_mux_ops, in sun4i_a10_display_init()
Dclk-factors.c247 mux_hw, &clk_mux_ops, in __sunxi_factors_register()
/drivers/clk/st/
Dclk-flexgen.c96 return clk_mux_ops.get_parent(mux_hw); in flexgen_get_parent()
106 return clk_mux_ops.set_parent(mux_hw, index); in flexgen_set_parent()
/drivers/clk/samsung/
Dclk-exynos-clkout.c103 &clk_mux_ops, NULL, NULL, &clkout->gate.hw, in exynos_clkout_init()
/drivers/clk/mmp/
Dclk-audio.c253 sspa_mux_parents, &clk_mux_ops, in register_clocks()
306 sspa1_mux_parents, &clk_mux_ops, in register_clocks()
/drivers/clk/zte/
Dclk.h108 &clk_mux_ops, \
/drivers/mmc/host/
Dmeson-mx-sdhc-clkc.c100 &clk_mux_ops, in meson_mx_sdhc_register_clkc()
/drivers/clk/rockchip/
Dclk-half-divider.c187 : &clk_mux_ops; in rockchip_clk_register_halfdiv()
Dclk.c65 : &clk_mux_ops; in rockchip_clk_register_branch()
274 frac->mux_ops = &clk_mux_ops; in rockchip_clk_register_frac_branch()
/drivers/clk/mediatek/
Dclk-mtk.c174 mux_ops = &clk_mux_ops; in mtk_clk_register_composite()
/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-meson8b.c161 ARRAY_SIZE(mux_parents), &clk_mux_ops, in meson8b_init_rgmii_tx_clk()
/drivers/pwm/
Dpwm-meson.c514 init.ops = &clk_mux_ops; in meson_pwm_init_channels()
/drivers/clk/tegra/
Dclk.h669 .mux_ops = &clk_mux_ops, \

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