Searched refs:clk_mux_ops (Results 1 – 25 of 31) sorted by relevance
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/drivers/clk/imx/ |
D | clk-composite-8m.c | 132 return clk_mux_ops.get_parent(hw); in imx8m_clk_composite_mux_get_parent() 166 return clk_mux_ops.determine_rate(hw, req); in imx8m_clk_composite_mux_determine_rate() 220 mux_ops = &clk_mux_ops; in imx8m_clk_hw_composite_flags()
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D | clk-composite-7ulp.c | 77 mux_hw, &clk_mux_ops, fd_hw, in imx7ulp_clk_hw_composite()
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D | clk-fixup-mux.c | 94 fixup_mux->ops = &clk_mux_ops; in imx_clk_hw_fixup_mux()
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D | clk-busy.c | 175 busy->mux_ops = &clk_mux_ops; in imx_clk_hw_busy_mux()
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/drivers/clk/ |
D | clk-mux.c | 136 const struct clk_ops clk_mux_ops = { variable 141 EXPORT_SYMBOL_GPL(clk_mux_ops); 179 init.ops = &clk_mux_ops; in __clk_hw_register_mux()
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D | clk-stm32f4.c | 1029 return clk_mux_ops.get_parent(hw); in cclk_mux_get_parent() 1040 ret = clk_mux_ops.set_parent(hw, index); in cclk_mux_set_parent() 1661 mux_ops = &clk_mux_ops; in stm32_register_aux_clk()
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D | clk-stm32mp1.c | 629 mux_ops = &clk_mux_ops; in clk_stm32_register_composite() 699 return clk_mux_ops.get_parent(hw); in clk_mmux_get_parent() 709 ret = clk_mux_ops.set_parent(hw, index); in clk_mmux_set_parent()
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/drivers/clk/nxp/ |
D | clk-lpc18xx-cgu.c | 548 &clk->mux.hw, &clk_mux_ops, in lpc18xx_cgu_register_div() 572 &clk->mux.hw, &clk_mux_ops, in lpc18xx_register_base_clk() 576 &clk->mux.hw, &clk_mux_ops, in lpc18xx_register_base_clk() 595 &clk->mux.hw, &clk_mux_ops, in lpc18xx_cgu_register_pll()
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/drivers/clk/sunxi/ |
D | clk-a20-gmac.c | 92 &mux->hw, &clk_mux_ops, in sun7i_a20_gmac_clk_setup()
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D | clk-a10-mod1.c | 55 &mux->hw, &clk_mux_ops, in sun4i_mod1_clk_setup()
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D | clk-sun8i-mbus.c | 78 &mux->hw, &clk_mux_ops, in sun8i_a23_mbus_setup()
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D | clk-sun9i-cpus.c | 218 &mux->hw, &clk_mux_ops, in sun9i_a80_cpus_setup()
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D | clk-sun4i-display.c | 159 &mux->hw, &clk_mux_ops, in sun4i_a10_display_init()
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D | clk-factors.c | 247 mux_hw, &clk_mux_ops, in __sunxi_factors_register()
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/drivers/clk/st/ |
D | clk-flexgen.c | 96 return clk_mux_ops.get_parent(mux_hw); in flexgen_get_parent() 106 return clk_mux_ops.set_parent(mux_hw, index); in flexgen_set_parent()
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/drivers/clk/samsung/ |
D | clk-exynos-clkout.c | 103 &clk_mux_ops, NULL, NULL, &clkout->gate.hw, in exynos_clkout_init()
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/drivers/clk/mmp/ |
D | clk-audio.c | 253 sspa_mux_parents, &clk_mux_ops, in register_clocks() 306 sspa1_mux_parents, &clk_mux_ops, in register_clocks()
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/drivers/clk/zte/ |
D | clk.h | 108 &clk_mux_ops, \
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/drivers/mmc/host/ |
D | meson-mx-sdhc-clkc.c | 100 &clk_mux_ops, in meson_mx_sdhc_register_clkc()
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/drivers/clk/rockchip/ |
D | clk-half-divider.c | 187 : &clk_mux_ops; in rockchip_clk_register_halfdiv()
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D | clk.c | 65 : &clk_mux_ops; in rockchip_clk_register_branch() 274 frac->mux_ops = &clk_mux_ops; in rockchip_clk_register_frac_branch()
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/drivers/clk/mediatek/ |
D | clk-mtk.c | 174 mux_ops = &clk_mux_ops; in mtk_clk_register_composite()
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/drivers/net/ethernet/stmicro/stmmac/ |
D | dwmac-meson8b.c | 161 ARRAY_SIZE(mux_parents), &clk_mux_ops, in meson8b_init_rgmii_tx_clk()
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/drivers/pwm/ |
D | pwm-meson.c | 514 init.ops = &clk_mux_ops; in meson_pwm_init_channels()
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/drivers/clk/tegra/ |
D | clk.h | 669 .mux_ops = &clk_mux_ops, \
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