Searched refs:clk_req (Results 1 – 15 of 15) sorted by relevance
| /drivers/gpu/drm/msm/dsi/phy/ |
| D | dsi_phy.h | 22 struct msm_dsi_phy_clk_request *clk_req);
100 struct msm_dsi_phy_clk_request *clk_req);
102 struct msm_dsi_phy_clk_request *clk_req);
104 struct msm_dsi_phy_clk_request *clk_req);
106 struct msm_dsi_phy_clk_request *clk_req);
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| D | dsi_phy.c | 49 struct msm_dsi_phy_clk_request *clk_req) in msm_dsi_dphy_timing_calc() argument
51 const unsigned long bit_rate = clk_req->bitclk_rate; in msm_dsi_dphy_timing_calc()
52 const unsigned long esc_rate = clk_req->escclk_rate; in msm_dsi_dphy_timing_calc()
144 struct msm_dsi_phy_clk_request *clk_req) in msm_dsi_dphy_timing_calc_v2() argument
146 const unsigned long bit_rate = clk_req->bitclk_rate; in msm_dsi_dphy_timing_calc_v2()
147 const unsigned long esc_rate = clk_req->escclk_rate; in msm_dsi_dphy_timing_calc_v2()
260 struct msm_dsi_phy_clk_request *clk_req) in msm_dsi_dphy_timing_calc_v3() argument
262 const unsigned long bit_rate = clk_req->bitclk_rate; in msm_dsi_dphy_timing_calc_v3()
263 const unsigned long esc_rate = clk_req->escclk_rate; in msm_dsi_dphy_timing_calc_v3()
368 struct msm_dsi_phy_clk_request *clk_req) in msm_dsi_dphy_timing_calc_v4() argument
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| D | dsi_phy_7nm.c | 73 struct msm_dsi_phy_clk_request *clk_req) in dsi_7nm_phy_enable() argument
88 if (msm_dsi_dphy_timing_calc_v4(timing, clk_req)) { in dsi_7nm_phy_enable()
109 less_than_1500_mhz = (clk_req->bitclk_rate <= 1500000000); in dsi_7nm_phy_enable()
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| D | dsi_phy_20nm.c | 67 struct msm_dsi_phy_clk_request *clk_req) in dsi_20nm_phy_enable() argument
76 if (msm_dsi_dphy_timing_calc(timing, clk_req)) { in dsi_20nm_phy_enable()
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| D | dsi_phy_14nm.c | 51 struct msm_dsi_phy_clk_request *clk_req) in dsi_14nm_phy_enable() argument
60 if (msm_dsi_dphy_timing_calc_v2(timing, clk_req)) { in dsi_14nm_phy_enable()
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| D | dsi_phy_10nm.c | 88 struct msm_dsi_phy_clk_request *clk_req) in dsi_10nm_phy_enable() argument
100 if (msm_dsi_dphy_timing_calc_v3(timing, clk_req)) { in dsi_10nm_phy_enable()
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| D | dsi_phy_28nm_8960.c | 121 struct msm_dsi_phy_clk_request *clk_req) in dsi_28nm_phy_enable() argument
128 if (msm_dsi_dphy_timing_calc(timing, clk_req)) { in dsi_28nm_phy_enable()
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| D | dsi_phy_28nm.c | 90 struct msm_dsi_phy_clk_request *clk_req) in dsi_28nm_phy_enable() argument
98 if (msm_dsi_dphy_timing_calc(timing, clk_req)) { in dsi_28nm_phy_enable()
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| /drivers/gpu/drm/msm/dsi/ |
| D | dsi.h | 175 struct msm_dsi_phy_clk_request *clk_req,
217 struct msm_dsi_phy_clk_request *clk_req);
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| D | dsi_manager.c | 127 struct msm_dsi_phy_clk_request clk_req; in enable_phy() local
131 msm_dsi_host_get_phy_clk_req(msm_dsi->host, &clk_req, is_dual_dsi); in enable_phy()
133 ret = msm_dsi_phy_enable(msm_dsi->phy, src_pll_id, &clk_req); in enable_phy()
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| D | dsi_host.c | 2320 struct msm_dsi_phy_clk_request *clk_req, in msm_dsi_host_get_phy_clk_req() argument
2333 clk_req->bitclk_rate = msm_host->byte_clk_rate * 8; in msm_dsi_host_get_phy_clk_req()
2334 clk_req->escclk_rate = msm_host->esc_clk_rate; in msm_dsi_host_get_phy_clk_req()
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| /drivers/nfc/s3fwrn5/ |
| D | nci.h | 66 __u8 clk_req; member
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| D | nci.c | 103 fw_cfg.clk_req = 0xff; in s3fwrn5_nci_rf_configure()
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| /drivers/clk/tegra/ |
| D | clk-dfll.c | 1130 struct clk_rate_request *clk_req) in dfll_clk_determine_rate() argument
1136 ret = dfll_calculate_rate_request(td, &req, clk_req->rate); in dfll_clk_determine_rate()
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| /drivers/pinctrl/tegra/ |
| D | pinctrl-tegra210.c | 1443 …PINGROUP(clk_req, SYS, RSVD1, RSVD2, RSVD3, 0x316c, N, N, N, 0x…
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