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Searched refs:clock_select (Results 1 – 6 of 6) sorted by relevance

/drivers/net/can/rcar/
Drcar_can.c100 u8 clock_select; member
440 writel((bcr << 8) | priv->clock_select, &priv->regs->bcr); in rcar_can_set_bittiming()
748 u32 clock_select = CLKR_CLKP1; in rcar_can_probe() local
753 &clock_select); in rcar_can_probe()
784 if (!(BIT(clock_select) & RCAR_SUPPORTED_CLOCKS)) { in rcar_can_probe()
789 priv->can_clk = devm_clk_get(&pdev->dev, clock_names[clock_select]); in rcar_can_probe()
801 priv->clock_select = clock_select; in rcar_can_probe()
/drivers/gpu/drm/vc4/
Dvc4_crtc.c406 VC4_SET_FIELD(vc4_encoder->clock_select, in vc4_crtc_config_pv()
1053 vc4_encoder->clock_select = i; in vc4_set_crtc_possible_masks()
Dvc4_drv.h444 u32 clock_select; member
/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega12_hwmgr.c62 PPCLK_e clock_select,
1812 PPCLK_e clock_select, in vega12_get_clock_ranges() argument
1818 *clock = data->clk_range[clock_select].ACMax; in vega12_get_clock_ranges()
1820 *clock = data->clk_range[clock_select].ACMin; in vega12_get_clock_ranges()
Dvega20_hwmgr.c1582 PP_Clock *clock, PPCLK_e clock_select) in vega20_get_max_sustainable_clock() argument
1588 (clock_select << 16), in vega20_get_max_sustainable_clock()
1597 (clock_select << 16), in vega20_get_max_sustainable_clock()
2036 PPCLK_e clock_select, in vega20_get_clock_ranges() argument
2044 PPSMC_MSG_GetMaxDpmFreq, (clock_select << 16), in vega20_get_clock_ranges()
2051 (clock_select << 16), in vega20_get_clock_ranges()
/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dsmu_v11_0.c780 enum smu_clk_type clock_select) in smu_v11_0_get_max_sustainable_clock() argument
791 clock_select); in smu_v11_0_get_max_sustainable_clock()