| /drivers/power/supply/ |
| D | s3c_adc_battery.c | 35 int cur_value; member
159 if (bat->volt_value < 0 || bat->cur_value < 0 || in s3c_adc_bat_get_property()
165 bat->cur_value = gather_samples(bat->client, in s3c_adc_bat_get_property()
180 (bat->cur_value / 1000), bat->pdata->internal_impedance); in s3c_adc_bat_get_property()
228 val->intval = bat->cur_value; in s3c_adc_bat_get_property()
310 main_bat.cur_value = -1; in s3c_adc_bat_probe()
|
| /drivers/gpu/drm/amd/pm/swsmu/smu12/ |
| D | renoir_ppt.c | 351 uint32_t cur_value = 0, value = 0, count = 0, min = 0, max = 0; in renoir_print_clk_levels() local
365 cur_value = metrics.ClockFrequency[CLOCK_GFXCLK]; in renoir_print_clk_levels()
369 if (cur_value == max) in renoir_print_clk_levels()
371 else if (cur_value == min) in renoir_print_clk_levels()
379 i == 1 ? cur_value : RENOIR_UMD_PSTATE_GFXCLK, in renoir_print_clk_levels()
387 cur_value = metrics.ClockFrequency[CLOCK_SOCCLK]; in renoir_print_clk_levels()
391 cur_value = metrics.ClockFrequency[CLOCK_FCLK]; in renoir_print_clk_levels()
395 cur_value = metrics.ClockFrequency[CLOCK_DCFCLK]; in renoir_print_clk_levels()
399 cur_value = metrics.ClockFrequency[CLOCK_FCLK]; in renoir_print_clk_levels()
412 cur_value == value ? "*" : ""); in renoir_print_clk_levels()
[all …]
|
| /drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| D | smu_helper.c | 114 uint32_t cur_value; in phm_wait_on_register() local
122 cur_value = cgs_read_register(hwmgr->device, index); in phm_wait_on_register()
123 if ((cur_value & mask) == (value & mask)) in phm_wait_on_register()
160 uint32_t cur_value; in phm_wait_for_register_unequal() local
166 cur_value = cgs_read_register(hwmgr->device, in phm_wait_for_register_unequal()
168 if ((cur_value & mask) != (value & mask)) in phm_wait_for_register_unequal()
|
| /drivers/gpu/drm/amd/pm/swsmu/ |
| D | smu_cmn.c | 90 uint32_t cur_value, i, timeout = adev->usec_timeout * 10; in smu_cmn_wait_for_response() local
93 cur_value = RREG32_SOC15_NO_KIQ(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu_cmn_wait_for_response()
94 if ((cur_value & MP1_C2PMSG_90__CONTENT_MASK) != 0) in smu_cmn_wait_for_response()
95 return cur_value == 0x1 ? 0 : -EIO; in smu_cmn_wait_for_response()
|
| /drivers/xen/xen-pciback/ |
| D | conf_space_header.c | 281 u8 cur_value; in bist_write() local
284 err = pci_read_config_byte(dev, offset, &cur_value); in bist_write()
288 if ((cur_value & ~PCI_BIST_START) == (value & ~PCI_BIST_START) in bist_write()
|
| /drivers/crypto/qat/qat_common/ |
| D | qat_hal.c | 1044 unsigned int cur_value; in qat_hal_concat_micro_code() local
1051 cur_value = value[0]; in qat_hal_concat_micro_code()
1061 INSERT_IMMED_GPRB_CONST(micro_inst[fixup_offset], (cur_value >> 0)); in qat_hal_concat_micro_code()
1063 INSERT_IMMED_GPRB_CONST(micro_inst[fixup_offset], (cur_value >> 0x10)); in qat_hal_concat_micro_code()
|
| /drivers/gpu/drm/amd/pm/swsmu/smu11/ |
| D | navi10_ppt.c | 938 uint32_t cur_value = 0, value = 0, count = 0; in navi10_print_clk_levels() local
959 ret = navi10_get_current_clk_freq_by_table(smu, clk_type, &cur_value); in navi10_print_clk_levels()
974 cur_value == value ? "*" : ""); in navi10_print_clk_levels()
984 freq_values[1] = cur_value; in navi10_print_clk_levels()
985 mark_index = cur_value == freq_values[0] ? 0 : in navi10_print_clk_levels()
986 cur_value == freq_values[2] ? 2 : 1; in navi10_print_clk_levels()
|
| D | sienna_cichlid_ppt.c | 943 uint32_t cur_value = 0, value = 0, count = 0; in sienna_cichlid_print_clk_levels() local
956 ret = sienna_cichlid_get_current_clk_freq_by_table(smu, clk_type, &cur_value); in sienna_cichlid_print_clk_levels()
975 cur_value == value ? "*" : ""); in sienna_cichlid_print_clk_levels()
985 freq_values[1] = cur_value; in sienna_cichlid_print_clk_levels()
986 mark_index = cur_value == freq_values[0] ? 0 : in sienna_cichlid_print_clk_levels()
987 cur_value == freq_values[2] ? 2 : 1; in sienna_cichlid_print_clk_levels()
997 cur_value == freq_values[i] ? "*" : ""); in sienna_cichlid_print_clk_levels()
|
| /drivers/net/ethernet/qlogic/qed/ |
| D | qed_main.c | 2383 u32 offset, mask, value, cur_value; in qed_nvm_flash_image_access() local
2401 cur_value = le32_to_cpu(*((__le32 *)buf)); in qed_nvm_flash_image_access()
2404 nvm_image.start_addr + offset, cur_value, in qed_nvm_flash_image_access()
2405 (cur_value & ~mask) | (value & mask), value, mask); in qed_nvm_flash_image_access()
2406 value = (value & mask) | (cur_value & ~mask); in qed_nvm_flash_image_access()
|
| /drivers/input/touchscreen/ |
| D | wdt87xx_i2c.c | 608 static u16 misr(u16 cur_value, u8 new_value) in misr() argument
614 a = cur_value; in misr()
|
| /drivers/scsi/bfa/ |
| D | bfa_defs_svc.h | 930 u16 cur_value; member
|
| D | bfa_fcpim.c | 3889 throttle.cur_value = (u16)(fcpim->fcp->num_ioim_reqs); in bfa_fcpim_throttle_get()
3892 throttle.cfg_value = throttle.cur_value; in bfa_fcpim_throttle_get()
|