Searched refs:dpll_clk (Results 1 – 2 of 2) sorted by relevance
| /drivers/ide/ |
| D | hpt366.c | 400 u8 dpll_clk; /* DPLL clock in MHz */ member
451 .dpll_clk = 0, /* no DPLL */
459 .dpll_clk = 48,
467 .dpll_clk = 48,
475 .dpll_clk = 48,
483 .dpll_clk = 55,
491 .dpll_clk = 66,
499 .dpll_clk = 66,
507 .dpll_clk = 66,
515 .dpll_clk = 77,
[all …]
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| /drivers/clk/ti/ |
| D | clkt_dpll.c | 240 u64 dpll_clk; in omap2_get_dpll_rate() local
262 dpll_clk = (u64)clk_hw_get_rate(dd->clk_ref) * dpll_mult; in omap2_get_dpll_rate()
263 do_div(dpll_clk, dpll_div + 1); in omap2_get_dpll_rate()
265 return dpll_clk; in omap2_get_dpll_rate()
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