Searched refs:dram_info (Results 1 – 6 of 6) sorted by relevance
182 struct dram_info *dram_info = &i915->dram_info; in skl_dram_get_channels_info() local191 dram_info->num_channels++; in skl_dram_get_channels_info()197 dram_info->num_channels++; in skl_dram_get_channels_info()199 if (dram_info->num_channels == 0) { in skl_dram_get_channels_info()210 dram_info->ranks = 1; in skl_dram_get_channels_info()212 dram_info->ranks = max(ch0.ranks, ch1.ranks); in skl_dram_get_channels_info()214 if (dram_info->ranks == 0) { in skl_dram_get_channels_info()219 dram_info->is_16gb_dimm = ch0.is_16gb_dimm || ch1.is_16gb_dimm; in skl_dram_get_channels_info()221 dram_info->symmetric_memory = intel_is_dram_symmetric(&ch0, &ch1); in skl_dram_get_channels_info()224 yesno(dram_info->symmetric_memory)); in skl_dram_get_channels_info()[all …]
1137 struct dram_info { struct1152 } dram_info; member
2932 if (dev_priv->dram_info.is_16gb_dimm) in intel_read_wm_latency()6848 return dev_priv->dram_info.symmetric_memory; in intel_can_enable_ipc()
75 const struct dram_info *dram_info = &dev_priv->dram_info; in icl_get_qgv_points() local78 qi->num_points = dram_info->num_qgv_points; in icl_get_qgv_points()81 qi->t_bl = dev_priv->dram_info.type == INTEL_DRAM_DDR4 ? 4 : 16; in icl_get_qgv_points()83 qi->t_bl = dev_priv->dram_info.type == INTEL_DRAM_DDR4 ? 4 : 8; in icl_get_qgv_points()149 int num_channels = dev_priv->dram_info.num_channels; in icl_get_bw_info()
5260 enum intel_dram_type type = dev_priv->dram_info.type; in tgl_bw_buddy_init()5261 u8 num_channels = dev_priv->dram_info.num_channels; in tgl_bw_buddy_init()
319 struct iwl_dram_sec_info dram_info; member341 struct iwl_dram_sec_info dram_info; member