Home
last modified time | relevance | path

Searched refs:drm_printf (Results 1 – 25 of 43) sorted by relevance

12

/drivers/gpu/drm/i915/gt/
Dintel_engine_cs.c1323 drm_printf(m, "%s %llx:%llx%s%s %s @ %dms: %s\n", in print_request()
1394 drm_printf(m, "*\n"); in hexdump()
1404 drm_printf(m, "[%04zx] %s\n", pos, line); in hexdump()
1430 drm_printf(m, "\tCCID: 0x%08x\n", ENGINE_READ(engine, CCID)); in intel_engine_print_registers()
1432 drm_printf(m, "\tEL_STAT_HI: 0x%08x\n", in intel_engine_print_registers()
1434 drm_printf(m, "\tEL_STAT_LO: 0x%08x\n", in intel_engine_print_registers()
1437 drm_printf(m, "\tRING_START: 0x%08x\n", in intel_engine_print_registers()
1439 drm_printf(m, "\tRING_HEAD: 0x%08x\n", in intel_engine_print_registers()
1441 drm_printf(m, "\tRING_TAIL: 0x%08x\n", in intel_engine_print_registers()
1443 drm_printf(m, "\tRING_CTL: 0x%08x%s\n", in intel_engine_print_registers()
[all …]
Dintel_sseu.c723 drm_printf(p, "slice total: %u, mask=%04x\n", in intel_sseu_dump()
725 drm_printf(p, "subslice total: %u\n", intel_sseu_subslice_total(sseu)); in intel_sseu_dump()
727 drm_printf(p, "slice%d: %u subslices, mask=%08x\n", in intel_sseu_dump()
731 drm_printf(p, "EU total: %u\n", sseu->eu_total); in intel_sseu_dump()
732 drm_printf(p, "EU per subslice: %u\n", sseu->eu_per_subslice); in intel_sseu_dump()
733 drm_printf(p, "has slice power gating: %s\n", in intel_sseu_dump()
735 drm_printf(p, "has subslice power gating: %s\n", in intel_sseu_dump()
737 drm_printf(p, "has EU power gating: %s\n", yesno(sseu->has_eu_pg)); in intel_sseu_dump()
746 drm_printf(p, "Unavailable\n"); in intel_sseu_print_topology()
751 drm_printf(p, "slice%d: %u subslice(s) (0x%08x):\n", in intel_sseu_print_topology()
[all …]
Dintel_breadcrumbs.c474 drm_printf(p, "Signals:\n"); in print_signals()
479 drm_printf(p, "\t[%llx:%llx%s] @ %dms\n", in print_signals()
498 drm_printf(p, "IRQ: %s\n", enableddisabled(b->irq_armed)); in intel_engine_print_breadcrumbs()
/drivers/gpu/drm/msm/adreno/
Da5xx_debugfs.c18 drm_printf(p, "PFP state:\n"); in pfp_print()
22 drm_printf(p, " %02x: %08x\n", i, in pfp_print()
31 drm_printf(p, "ME state:\n"); in me_print()
35 drm_printf(p, " %02x: %08x\n", i, in me_print()
44 drm_printf(p, "MEQ state:\n"); in meq_print()
48 drm_printf(p, " %02x: %08x\n", i, in meq_print()
57 drm_printf(p, "ROQ state:\n"); in roq_print()
65 drm_printf(p, " %02x: %08x %08x %08x %08x\n", i, in roq_print()
Dadreno_gpu.c670 drm_printf(p, "revision: %d (%d.%d.%d.%d)\n", in adreno_show()
675 drm_printf(p, "rbbm-status: 0x%08x\n", state->rbbm_status); in adreno_show()
680 drm_printf(p, " - id: %d\n", i); in adreno_show()
681 drm_printf(p, " iova: 0x%016llx\n", state->ring[i].iova); in adreno_show()
682 drm_printf(p, " last-fence: %d\n", state->ring[i].seqno); in adreno_show()
683 drm_printf(p, " retired-fence: %d\n", state->ring[i].fence); in adreno_show()
684 drm_printf(p, " rptr: %d\n", state->ring[i].rptr); in adreno_show()
685 drm_printf(p, " wptr: %d\n", state->ring[i].wptr); in adreno_show()
686 drm_printf(p, " size: %d\n", MSM_GPU_RINGBUFFER_SZ); in adreno_show()
696 drm_printf(p, " - iova: 0x%016llx\n", in adreno_show()
[all …]
Da6xx_gpu_state.c987 drm_printf(p, " - { offset: 0x%06x, value: 0x%08x }\n", in a6xx_show_registers()
1037 drm_printf(p, " - bank: %d\n", i); in a6xx_show_shader()
1038 drm_printf(p, " size: %d\n", block->size); in a6xx_show_shader()
1056 drm_printf(p, " - context: %d\n", ctx); in a6xx_show_cluster_data()
1067 drm_printf(p, " - { offset: 0x%06x, value: 0x%08x }\n", in a6xx_show_cluster_data()
1107 drm_printf(p, " dwords: %d\n", indexed->count); in a6xx_show_indexed_regs()
1122 drm_printf(p, " count: %d\n", block->count << 1); in a6xx_show_debugbus_block()
1143 drm_printf(p, " count: %d\n", VBIF_DEBUGBUS_BLOCK_SIZE); in a6xx_show_debugbus()
/drivers/gpu/drm/i915/
Dintel_device_info.c96 drm_printf(p, "gen: %d\n", info->gen); in intel_device_info_print_static()
97 drm_printf(p, "gt: %d\n", info->gt); in intel_device_info_print_static()
98 drm_printf(p, "iommu: %s\n", iommu_name()); in intel_device_info_print_static()
99 drm_printf(p, "memory-regions: %x\n", info->memory_regions); in intel_device_info_print_static()
100 drm_printf(p, "page-sizes: %x\n", info->page_sizes); in intel_device_info_print_static()
101 drm_printf(p, "platform: %s\n", intel_platform_name(info->platform)); in intel_device_info_print_static()
102 drm_printf(p, "ppgtt-size: %d\n", info->ppgtt_size); in intel_device_info_print_static()
103 drm_printf(p, "ppgtt-type: %d\n", info->ppgtt_type); in intel_device_info_print_static()
104 drm_printf(p, "dma_mask_size: %u\n", info->dma_mask_size); in intel_device_info_print_static()
106 #define PRINT_FLAG(name) drm_printf(p, "%s: %s\n", #name, yesno(info->name)); in intel_device_info_print_static()
[all …]
Di915_params.c206 drm_printf(p, "i915.%s=%s\n", name, yesno(*(const bool *)x)); in _print_param()
208 drm_printf(p, "i915.%s=%d\n", name, *(const int *)x); in _print_param()
210 drm_printf(p, "i915.%s=%u\n", name, *(const unsigned int *)x); in _print_param()
212 drm_printf(p, "i915.%s=%lu\n", name, *(const unsigned long *)x); in _print_param()
214 drm_printf(p, "i915.%s=%s\n", name, *(const char **)x); in _print_param()
Dintel_runtime_pm.c187 drm_printf(p, "Wakeref last acquired:\n%s", buf); in __print_intel_runtime_pm_wakeref()
192 drm_printf(p, "Wakeref last released:\n%s", buf); in __print_intel_runtime_pm_wakeref()
195 drm_printf(p, "Wakeref count: %lu\n", dbg->count); in __print_intel_runtime_pm_wakeref()
207 drm_printf(p, "Wakeref x%lu taken at:\n%s", rep, buf); in __print_intel_runtime_pm_wakeref()
/drivers/gpu/drm/
Ddrm_atomic.c394 drm_printf(p, "crtc[%u]: %s\n", crtc->base.id, crtc->name); in drm_atomic_crtc_print_state()
395 drm_printf(p, "\tenable=%d\n", state->enable); in drm_atomic_crtc_print_state()
396 drm_printf(p, "\tactive=%d\n", state->active); in drm_atomic_crtc_print_state()
397 drm_printf(p, "\tself_refresh_active=%d\n", state->self_refresh_active); in drm_atomic_crtc_print_state()
398 drm_printf(p, "\tplanes_changed=%d\n", state->planes_changed); in drm_atomic_crtc_print_state()
399 drm_printf(p, "\tmode_changed=%d\n", state->mode_changed); in drm_atomic_crtc_print_state()
400 drm_printf(p, "\tactive_changed=%d\n", state->active_changed); in drm_atomic_crtc_print_state()
401 drm_printf(p, "\tconnectors_changed=%d\n", state->connectors_changed); in drm_atomic_crtc_print_state()
402 drm_printf(p, "\tcolor_mgmt_changed=%d\n", state->color_mgmt_changed); in drm_atomic_crtc_print_state()
403 drm_printf(p, "\tplane_mask=%x\n", state->plane_mask); in drm_atomic_crtc_print_state()
[all …]
Ddrm_print.c188 drm_printf(p, "%s", str); in drm_puts()
197 void drm_printf(struct drm_printer *p, const char *f, ...) in drm_printf() function
205 EXPORT_SYMBOL(drm_printf);
229 drm_printf(p, "%s%s", first ? "" : ",", in drm_print_bits()
234 drm_printf(p, "(none)"); in drm_print_bits()
339 drm_printf(p, "%*s = 0x%08x\n", in drm_print_regset32()
Ddrm_gem_ttm_helper.c44 drm_printf(p, "\n"); in drm_gem_ttm_print_info()
Ddrm_mm.c1011 drm_printf(p, "%#018llx-%#018llx: %llu: free\n", in drm_mm_dump_hole()
1030 drm_printf(p, "%#018llx-%#018llx: %llu: used\n", entry->start, in drm_mm_print()
1037 drm_printf(p, "total: %llu, used %llu free %llu\n", total, in drm_mm_print()
/drivers/gpu/drm/i915/gt/uc/
Dintel_uc_debugfs.c20 drm_printf(&p, "[guc] supported:%s wanted:%s used:%s\n", in uc_usage_show()
24 drm_printf(&p, "[huc] supported:%s wanted:%s used:%s\n", in uc_usage_show()
28 drm_printf(&p, "[submission] supported:%s wanted:%s used:%s\n", in uc_usage_show()
Dintel_guc.c741 drm_printf(p, "GuC not supported\n"); in intel_guc_load_status()
746 drm_printf(p, "GuC disabled\n"); in intel_guc_load_status()
756 drm_printf(p, "\nGuC status 0x%08x:\n", status); in intel_guc_load_status()
757 drm_printf(p, "\tBootrom status = 0x%x\n", in intel_guc_load_status()
759 drm_printf(p, "\tuKernel status = 0x%x\n", in intel_guc_load_status()
761 drm_printf(p, "\tMIA Core status = 0x%x\n", in intel_guc_load_status()
765 drm_printf(p, "\t%2d: \t0x%x\n", in intel_guc_load_status()
Dintel_huc.c249 drm_printf(p, "HuC not supported\n"); in intel_huc_load_status()
254 drm_printf(p, "HuC disabled\n"); in intel_huc_load_status()
261 drm_printf(p, "HuC status: 0x%08x\n", in intel_huc_load_status()
Dintel_uc_fw.c607 drm_printf(p, "%s firmware: %s\n", in intel_uc_fw_dump()
609 drm_printf(p, "\tstatus: %s\n", in intel_uc_fw_dump()
611 drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n", in intel_uc_fw_dump()
614 drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size); in intel_uc_fw_dump()
615 drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size); in intel_uc_fw_dump()
Dintel_guc_log.c709 drm_printf(p, "\tRelay full count: %u\n", log->relay.full_count); in intel_guc_log_info()
712 drm_printf(p, "\t%s:\tflush count %10u, overflow count %10u\n", in intel_guc_log_info()
755 drm_printf(p, "0x%08x 0x%08x 0x%08x 0x%08x\n", in intel_guc_log_dump()
/drivers/gpu/drm/i915/selftests/
Di915_active.c280 drm_printf(m, "active %ps:%ps\n", ref->active, ref->retire); in i915_active_print()
281 drm_printf(m, "\tcount: %d\n", atomic_read(&ref->count)); in i915_active_print()
282 drm_printf(m, "\tpreallocated barriers? %s\n", in i915_active_print()
293 drm_printf(m, "\tbarrier: %s\n", engine->name); in i915_active_print()
298 drm_printf(m, in i915_active_print()
/drivers/gpu/drm/ttm/
Dttm_resource.c140 drm_printf(p, " use_type: %d\n", man->use_type); in ttm_resource_manager_debug()
141 drm_printf(p, " use_tt: %d\n", man->use_tt); in ttm_resource_manager_debug()
142 drm_printf(p, " size: %llu\n", man->size); in ttm_resource_manager_debug()
/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_smp.c336 drm_printf(p, "name\tinuse\tplane\n"); in mdp5_smp_dump()
337 drm_printf(p, "----\t-----\t-----\n"); in mdp5_smp_dump()
357 drm_printf(p, "%s:%d\t%d\t%s\n", in mdp5_smp_dump()
365 drm_printf(p, "TOTAL:\t%d\t(of %d)\n", total, smp->blk_cnt); in mdp5_smp_dump()
366 drm_printf(p, "AVAIL:\t%d\n", smp->blk_cnt - in mdp5_smp_dump()
Dmdp5_plane.c162 drm_printf(p, "\thwpipe=%s\n", pstate->hwpipe ? in mdp5_plane_atomic_print_state()
165 drm_printf(p, "\tright-hwpipe=%s\n", in mdp5_plane_atomic_print_state()
168 drm_printf(p, "\tpremultiplied=%u\n", pstate->premultiplied); in mdp5_plane_atomic_print_state()
169 drm_printf(p, "\tzpos=%u\n", pstate->zpos); in mdp5_plane_atomic_print_state()
170 drm_printf(p, "\talpha=%u\n", pstate->alpha); in mdp5_plane_atomic_print_state()
171 drm_printf(p, "\tstage=%s\n", stage2name(pstate->stage)); in mdp5_plane_atomic_print_state()
/drivers/gpu/drm/selftests/
Dtest-drm_dp_mst_helper.c131 drm_printf(&p, "Failed to decode sideband request: %d\n", in sideband_msg_req_encode_decode()
137 drm_printf(&p, "Encode/decode failed, expected:\n"); in sideband_msg_req_encode_decode()
139 drm_printf(&p, "Got:\n"); in sideband_msg_req_encode_decode()
/drivers/gpu/drm/msm/
Dmsm_gpu.c288 drm_printf(&p, "---\n"); in msm_gpu_devcoredump_read()
289 drm_printf(&p, "kernel: " UTS_RELEASE "\n"); in msm_gpu_devcoredump_read()
290 drm_printf(&p, "module: " KBUILD_MODNAME "\n"); in msm_gpu_devcoredump_read()
291 drm_printf(&p, "time: %lld.%09ld\n", in msm_gpu_devcoredump_read()
294 drm_printf(&p, "comm: %s\n", state->comm); in msm_gpu_devcoredump_read()
296 drm_printf(&p, "cmdline: %s\n", state->cmd); in msm_gpu_devcoredump_read()
/drivers/gpu/drm/arm/
Dmalidp_planes.c140 drm_printf(p, "\trotmem_size=%u\n", ms->rotmem_size); in malidp_plane_atomic_print_state()
141 drm_printf(p, "\tformat_id=%u\n", ms->format); in malidp_plane_atomic_print_state()
142 drm_printf(p, "\tn_planes=%u\n", ms->n_planes); in malidp_plane_atomic_print_state()
143 drm_printf(p, "\tmmu_prefetch_mode=%s\n", in malidp_plane_atomic_print_state()
145 drm_printf(p, "\tmmu_prefetch_pgsize=%d\n", ms->mmu_prefetch_pgsize); in malidp_plane_atomic_print_state()

12