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Searched refs:ereg (Results 1 – 10 of 10) sorted by relevance

/drivers/regulator/
Dda903x-regulator.c309 #define DA903x_LDO(_pmic, _id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
325 .enable_reg = _pmic##_##ereg, \
329 #define DA903x_DVC(_pmic, _id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ argument
347 .enable_reg = _pmic##_##ereg, \
351 #define DA9034_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
352 DA903x_LDO(DA9034, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
354 #define DA9030_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ argument
355 DA903x_LDO(DA9030, _id, min, max, step, vreg, shift, nbits, ereg, ebit)
357 #define DA9030_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ argument
359 ereg, ebit)
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Dhi6421-regulator.c129 #define HI6421_LDO(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
144 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
169 ereg, emask, odelay, ecomask, ecoamp) \ argument
184 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
209 ereg, emask, odelay, ecomask, ecoamp) \ argument
224 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
245 #define HI6421_BUCK012(_id, _match, vreg, vmask, ereg, emask, sleepmask,\ argument
261 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
282 #define HI6421_BUCK345(_id, _match, v_table, vreg, vmask, ereg, emask, \ argument
297 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
D88pm8607.c231 #define PM8606_PREG(ereg, ebit) \ argument
241 .enable_reg = PM8606_##ereg, \
247 #define PM8607_DVC(vreg, ureg, ubit, ereg, ebit) \ argument
263 .enable_reg = PM8607_##ereg, \
270 #define PM8607_LDO(_id, vreg, shift, ereg, ebit) \ argument
284 .enable_reg = PM8607_##ereg, \
Dhi655x-regulator.c107 #define HI655X_LDO(_ID, vreg, vmask, ereg, dreg, \ argument
121 .enable_reg = HI655X_BUS_ADDR(ereg), \
128 #define HI655X_LDO_LINEAR(_ID, vreg, vmask, ereg, dreg, \ argument
143 .enable_reg = HI655X_BUS_ADDR(ereg), \
D88pm800-regulator.c86 #define PM800_BUCK(match, vreg, ereg, ebit, amax, volt_ranges, n_volt) \ argument
101 .enable_reg = PM800_##ereg, \
116 #define PM800_LDO(match, vreg, ereg, ebit, amax, ldo_volt_table) \ argument
129 .enable_reg = PM800_##ereg, \
Dhi6421v530-regulator.c73 #define HI6421V530_LDO(_ID, v_table, vreg, vmask, ereg, emask, \ argument
87 .enable_reg = HI6421_REG_TO_BUS_ADDR(ereg), \
Drn5t618-regulator.c25 #define REG(rid, ereg, emask, vreg, vmask, min, max, step) \ argument
37 .enable_reg = RN5T618_##ereg, \
Dmt6360-regulator.c322 #define MT6360_REGULATOR_DESC(_name, _sname, ereg, emask, vreg, vmask, \ argument
338 .enable_reg = ereg, \
Dslg51000-regulator.c48 unsigned int ereg; member
357 ret = regmap_bulk_read(regmap, es_reg[i].ereg, evt[i], REG_MAX); in slg51000_irq_handler()
/drivers/net/phy/
Dmicrochip_t1.c54 u16 ereg = 0; in access_ereg() local
69 ereg = LAN87XX_EXT_REG_CTL_WR_CTL; in access_ereg()
74 ereg = LAN87XX_EXT_REG_CTL_RD_CTL; in access_ereg()
77 ereg |= (bank << 8) | offset; in access_ereg()
79 rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, ereg); in access_ereg()