Searched refs:ext_clock (Results 1 – 8 of 8) sorted by relevance
| /drivers/media/i2c/ |
| D | aptina-pll.c | 28 pll->ext_clock, pll->pix_clock); in aptina_pll_calculate()
30 if (pll->ext_clock < limits->ext_clock_min || in aptina_pll_calculate()
31 pll->ext_clock > limits->ext_clock_max) { in aptina_pll_calculate()
42 div = gcd(pll->pix_clock, pll->ext_clock); in aptina_pll_calculate()
44 div = pll->ext_clock / div; in aptina_pll_calculate()
58 (pll->ext_clock / limits->n_min * pll->m)); in aptina_pll_calculate()
62 (pll->ext_clock / limits->n_max * pll->m)); in aptina_pll_calculate()
129 pll->ext_clock * pll->m)); in aptina_pll_calculate()
131 (pll->ext_clock * pll->m)); in aptina_pll_calculate()
138 mf_low = roundup(max(mf_min, DIV_ROUND_UP(pll->ext_clock * p1, in aptina_pll_calculate()
[all …]
|
| D | aptina-pll.h | 12 unsigned int ext_clock; member
|
| D | mt9m032.c | 273 pll.ext_clock = pdata->ext_clock; in mt9m032_setup_pll()
|
| D | mt9p031.c | 259 mt9p031->pll.ext_clock = pdata->ext_freq; in mt9p031_clk_setup()
|
| /drivers/media/i2c/et8ek8/ |
| D | et8ek8_mode.c | 47 .ext_clock = 9600000,
148 .ext_clock = 9600000,
204 .ext_clock = 9600000,
260 .ext_clock = 9600000,
316 .ext_clock = 9600000,
372 .ext_clock = 9600000,
427 .ext_clock = 9600000,
483 .ext_clock = 9600000,
539 .ext_clock = 9600000,
|
| D | et8ek8_reg.h | 40 u32 ext_clock; /* in Hz */ member
|
| D | et8ek8_driver.c | 829 xclk_freq = sensor->current_reglist->mode.ext_clock; in et8ek8_power_on()
1070 if (sensor->current_reglist->mode.ext_clock != reglist->mode.ext_clock) in et8ek8_set_frame_interval()
|
| /drivers/staging/comedi/drivers/ |
| D | cb_pcidas64.c | 1174 struct ext_clock_info ext_clock; member
1942 devpriv->ext_clock.divisor = divisor; in ai_config_master_clock_4020()
1943 devpriv->ext_clock.chanspec = data[2]; in ai_config_master_clock_4020()
2309 divisor = devpriv->ext_clock.divisor; in ai_convert_counter_4020()
2329 int chanspec = devpriv->ext_clock.chanspec; in select_master_clock_4020()
|