| /drivers/clk/spear/ |
| D | spear1310_clock.c | 379 static const char *i2c_parents[] = { "ras_apb_clk", "gen_syn1_clk", }; variable
1002 clk = clk_register_mux(NULL, "i2c1_mclk", i2c_parents, in spear1310_clk_init()
1003 ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, in spear1310_clk_init()
1013 clk = clk_register_mux(NULL, "i2c2_mclk", i2c_parents, in spear1310_clk_init()
1014 ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, in spear1310_clk_init()
1024 clk = clk_register_mux(NULL, "i2c3_mclk", i2c_parents, in spear1310_clk_init()
1025 ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, in spear1310_clk_init()
1035 clk = clk_register_mux(NULL, "i2c4_mclk", i2c_parents, in spear1310_clk_init()
1036 ARRAY_SIZE(i2c_parents), CLK_SET_RATE_NO_REPARENT, in spear1310_clk_init()
1046 clk = clk_register_mux(NULL, "i2c5_mclk", i2c_parents, in spear1310_clk_init()
[all …]
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| /drivers/clk/ |
| D | clk-stm32f4.c | 1145 static const char *i2c_parents[4] = { "apb1_div", "sys", "hsi", "no-clock" }; variable
1355 i2c_parents, ARRAY_SIZE(i2c_parents),
1362 i2c_parents, ARRAY_SIZE(i2c_parents),
1369 i2c_parents, ARRAY_SIZE(i2c_parents),
1376 i2c_parents, ARRAY_SIZE(i2c_parents),
1506 i2c_parents, ARRAY_SIZE(i2c_parents),
1513 i2c_parents, ARRAY_SIZE(i2c_parents),
1520 i2c_parents, ARRAY_SIZE(i2c_parents),
1527 i2c_parents, ARRAY_SIZE(i2c_parents),
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| /drivers/clk/sprd/ |
| D | sc9863a-clk.c | 913 static const struct clk_parent_data i2c_parents[] = { variable
919 static SPRD_COMP_CLK_DATA(ap_i2c0, "ap-i2c0", i2c_parents, 0x58,
921 static SPRD_COMP_CLK_DATA(ap_i2c1, "ap-i2c1", i2c_parents, 0x5c,
923 static SPRD_COMP_CLK_DATA(ap_i2c2, "ap-i2c2", i2c_parents, 0x60,
925 static SPRD_COMP_CLK_DATA(ap_i2c3, "ap-i2c3", i2c_parents, 0x64,
927 static SPRD_COMP_CLK_DATA(ap_i2c4, "ap-i2c4", i2c_parents, 0x68,
929 static SPRD_COMP_CLK_DATA(ap_i2c5, "ap-i2c5", i2c_parents, 0x6c,
931 static SPRD_COMP_CLK_DATA(ap_i2c6, "ap-i2c6", i2c_parents, 0x70,
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| D | sc9860-clk.c | 400 static const char * const i2c_parents[] = { "ext-26m", "twpll-48m", variable
402 static SPRD_COMP_CLK(i2c0_clk, "i2c0", i2c_parents, 0x44,
404 static SPRD_COMP_CLK(i2c1_clk, "i2c1", i2c_parents, 0x48,
406 static SPRD_COMP_CLK(i2c2_clk, "i2c2", i2c_parents, 0x4c,
408 static SPRD_COMP_CLK(i2c3_clk, "i2c3", i2c_parents, 0x50,
410 static SPRD_COMP_CLK(i2c4_clk, "i2c4", i2c_parents, 0x54,
412 static SPRD_COMP_CLK(i2c5_clk, "i2c5", i2c_parents, 0x58,
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| /drivers/clk/mediatek/ |
| D | clk-mt8516.c | 296 static const char * const i2c_parents[] __initconst = { variable
401 MUX(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents,
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| D | clk-mt8167.c | 456 static const char * const i2c_parents[] __initconst = { variable
591 MUX(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents,
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| D | clk-mt6779.c | 465 static const char * const i2c_parents[] = { variable
730 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C, "i2c_sel", i2c_parents,
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| D | clk-mt2712.c | 677 static const char * const i2c_parents[] = { variable
881 i2c_parents, 0x560, 0, 3, 7),
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| D | clk-mt6765.c | 316 static const char * const i2c_parents[] = { variable
445 MUX_GATE_CLR_SET_UPD(CLK_TOP_I2C_SEL, "i2c_sel", i2c_parents, CLK_CFG_6,
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| D | clk-mt8183.c | 448 static const char * const i2c_parents[] = { variable
627 i2c_parents, 0xc0,
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