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Searched refs:i915_ggtt_pin (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/i915/gt/
Dintel_timeline.c343 err = i915_ggtt_pin(tl->hwsp_ggtt, ww, 0, PIN_HIGH); in intel_timeline_pin()
486 err = i915_ggtt_pin(vma, NULL, 0, PIN_HIGH); in __intel_timeline_get_seqno()
Dintel_ring.c48 ret = i915_ggtt_pin(vma, ww, 0, flags); in intel_ring_pin()
Dintel_context.c108 err = i915_ggtt_pin(vma, ww, 0, bias | PIN_HIGH); in __context_pin_state()
Dgen6_ppgtt.c403 err = i915_ggtt_pin(ppgtt->vma, ww, GEN6_PD_ALIGN, PIN_HIGH); in gen6_ppgtt_pin()
Dintel_gt.c361 ret = i915_ggtt_pin(vma, NULL, 0, PIN_HIGH); in intel_gt_init_scratch()
Dintel_engine_cs.c639 return i915_ggtt_pin(vma, NULL, 0, flags); in pin_ggtt_status_page()
Dintel_lrc.c3924 err = i915_ggtt_pin(vma, NULL, 0, PIN_HIGH); in lrc_setup_wa_ctx()
Dselftest_lrc.c3092 err = i915_ggtt_pin(vma, NULL, 0, 0); in create_global()
/drivers/gpu/drm/i915/
Di915_vma.h249 int i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
Di915_vma.c1018 int i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww, in i915_ggtt_pin() function
/drivers/gpu/drm/i915/gt/uc/
Dintel_guc.c680 ret = i915_ggtt_pin(vma, NULL, 0, flags); in intel_guc_allocate_vma()
/drivers/gpu/drm/i915/display/
Dintel_display.c3460 if (i915_ggtt_pin(vma, NULL, 0, PIN_MAPPABLE | PIN_OFFSET_FIXED | base)) in initial_plane_vma()