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Searched refs:ixSYSHUB_MMREG_IND_DMA_CLK0_SW2_CL0_CNTL (Results 1 – 2 of 2) sorted by relevance

/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_6_1_offset.h3604 #define ixSYSHUB_MMREG_IND_DMA_CLK0_SW2_CL0_CNTL macro
Dnbio_7_0_offset.h4586 #define ixSYSHUB_MMREG_IND_DMA_CLK0_SW2_CL0_CNTL macro